Three-dimensional 35 nF/mm2 MIM capacitors integrated in BiCMOS technology

Proceedings of ESSDERC 2005: 35th European Solid-State Device Research Conference

Volumn 2005, Issue , 2005, Pages 121-124

  Bajolet, A ^a,b   Giraudin, J C ^a   Rossato, C ^a   Pinzelli, L ^a   Bruyere S ^a   Cremer S ^a   Jagueneau, T ^a   Delpech, P ^a   Montes L ^b   Ghibaudo, G ^b  

^a STMICROELECTRONICS   (France)

^b IMEP LAHC   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ALUMINA; CAPACITANCE; CMOS INTEGRATED CIRCUITS; DIELECTRIC MATERIALS; METALLORGANIC CHEMICAL VAPOR DEPOSITION; MICROPROCESSOR CHIPS; TANTALUM COMPOUNDS;

ATOMIC LAYER DEPOSITION (ALD); BICMOS TECHNOLOGY; CAPACITANCE DENSITY; HIGH DENSITY TRENCH CAPACITOR (HIDTC);

CAPACITORS;

EID: 33751426890     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDER.2005.1546600     Document Type: Conference Paper

References (8)

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