Using the NS-2 network simulator for evaluating network on chips (NoC)

Proceedings - 2nd International Conference on Emerging Technologies 2006, ICET 2006

Volumn , Issue , 2006, Pages 506-512

  Ali, Muhammad ^a   Welzl, Michael ^a   Adnan, Awais ^b   Nadeem, Farrukh ^a  

^a UNIVERSITY OF INNSBRUCK   (Austria)

^b Institute of Management Sciences   (Pakistan)

Author keywords

Network on chips (NoCs); Network simulator (ns 2); Simulation and modeling

Indexed keywords

ELECTRIC NETWORK TOPOLOGY; INTEGRATED CIRCUITS; MICROPROCESSOR CHIPS;

CHIP DESIGNS; CURRENT INTERCONNECTS; FAULT-TOLERANT PROTOCOLS; INTERNATIONAL CONFERENCES; NETWORK ELEMENTS; NETWORK ON CHIPS (NOC'S); NETWORK SIMULATOR (NS-2); NETWORK SIMULATOR NS 2; NETWORKS ON CHIPS (NOCS); SIMULATION TOOLS; VLSI CHIPS;

BIOLOGICAL MATERIALS;

EID: 46149108787     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICET.2006.335967     Document Type: Conference Paper

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