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Volumn , Issue , 2007, Pages 123-126

Analog design challenges and trade-offs using emerging materials and devices

Author keywords

[No Author keywords available]

Indexed keywords

ARCHITECTURAL DESIGN; GEOMETRICAL OPTICS; MICROPROCESSOR CHIPS; PIGMENTS;

EID: 44849110272     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2007.4430261     Document Type: Conference Paper
Times cited : (8)

References (13)
  • 5
    • 33646078317 scopus 로고    scopus 로고
    • Characterization of Mixed-Signal Properties of MOSFETs with High-k (SiON/HfSiON/TaN) Gate Stacks
    • Z. Rittersma et al., "Characterization of Mixed-Signal Properties of MOSFETs with High-k (SiON/HfSiON/TaN) Gate Stacks," IEEE Transactions on Electron Devices, vol. 53, no. 5, pp. 1216-1225, 2006.
    • (2006) IEEE Transactions on Electron Devices , vol.53 , Issue.5 , pp. 1216-1225
    • Rittersma, Z.1
  • 6
  • 7
    • 39549102316 scopus 로고    scopus 로고
    • A low-power Multi-Gate FET CMOS Technology with 13.2ps Inverter Delay
    • K. von Arnim et al., "A low-power Multi-Gate FET CMOS Technology with 13.2ps Inverter Delay," in 2007 Symposium on VSLI Technology, in press, 2007.
    • (2007) 2007 Symposium on VSLI Technology, in press
    • von Arnim, K.1
  • 9
    • 34250680414 scopus 로고    scopus 로고
    • Stochastic Matching Properties of FinFETs
    • C. Gustin et al., "Stochastic Matching Properties of FinFETs," IEEE Electron Device Letters, vol. 27, no. 10, pp. 846-848, 2006.
    • (2006) IEEE Electron Device Letters , vol.27 , Issue.10 , pp. 846-848
    • Gustin, C.1
  • 10
    • 33744719366 scopus 로고    scopus 로고
    • Fin thickness asymmetry effects in multiple-gate SOI FETs (MuGFETs)
    • IEEE
    • T. Schulz et al., "Fin thickness asymmetry effects in multiple-gate SOI FETs (MuGFETs)," in 2005 IEEE International SOI Conference Proceedings. IEEE, 2005, pp. 154-156.
    • (2005) 2005 IEEE International SOI Conference Proceedings , pp. 154-156
    • Schulz, T.1
  • 12
    • 44849117582 scopus 로고    scopus 로고
    • A. Shanware et al., Characterization and comparison of the charge trapping in HfSiON and HfO2 gate dielectrics, in IEEE International Electron Devices Meeting, 2003. IEDM Technical Digest., 2003, pp. 38.6.1-38.6.4.
    • A. Shanware et al., "Characterization and comparison of the charge trapping in HfSiON and HfO2 gate dielectrics," in IEEE International Electron Devices Meeting, 2003. IEDM Technical Digest., 2003, pp. 38.6.1-38.6.4.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.