Interconnect planning with local area constrained retiming

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2003, Pages 442-447

  Lu, Ruibing ^a   Koh, Cheng Kok ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN ITERATION; GLOBAL ROUTING; HIGH-LEVEL DESIGN; LOCAL AREAS; PHYSICAL PLANNING; PLACEMENT PROBLEMS; PLANNING STEPS; REPEATER INSERTION;

DESIGN; EXHIBITIONS; FLIP FLOP CIRCUITS;

PROBLEM SOLVING;

EID: 4444248311     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2003.1253649     Document Type: Conference Paper

References (14)

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