Routability-driven repeater block planning for interconnect-centric floorplanning

Proceedings of the International Symposium on Physical Design

Volumn , Issue , 2000, Pages 186-191

  Sarkar, Probir ^a   Sundararaman, Vivek ^a   Koh, Cheng Kok ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ELECTRIC NETWORK SYNTHESIS; MICROPROCESSOR CHIPS;

INTERCONNECT-CENTRIC FLOORPLANNING; REPEATER BLOCK PLANNING ALGORITHMS;

INTEGRATED CIRCUIT LAYOUT;

EID: 0033723975     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/332357.332398     Document Type: Conference Paper

References (28)