-
1
-
-
0041340533
-
Negative bias temperature instability: Road to cross in deep submicron silicon semiconductor manufacturing
-
Jul
-
D. K. Schroder and J. A. Babcock, "Negative bias temperature instability: Road to cross in deep submicron silicon semiconductor manufacturing," J. Appl. Phys., vol. 94, no. 1, pp. 1-18, Jul. 2003.
-
(2003)
J. Appl. Phys
, vol.94
, Issue.1
, pp. 1-18
-
-
Schroder, D.K.1
Babcock, J.A.2
-
2
-
-
33947281578
-
Negative bias temperature instability in low-temperature polycrystalline silicon thin-film transistors
-
Dec
-
C. Y. Chen, J. W. Lee, S. D. Wang, M. S. Sheih, P. H. Lee, W. C. Chen, H. Y. Lin, K. L. Yeh, and T. F. Lei, "Negative bias temperature instability in low-temperature polycrystalline silicon thin-film transistors," IEEE Trans. Electron Devices, vol. 53, no. 12, pp. 2993-3000, Dec. 2006.
-
(2006)
IEEE Trans. Electron Devices
, vol.53
, Issue.12
, pp. 2993-3000
-
-
Chen, C.Y.1
Lee, J.W.2
Wang, S.D.3
Sheih, M.S.4
Lee, P.H.5
Chen, W.C.6
Lin, H.Y.7
Yeh, K.L.8
Lei, T.F.9
-
3
-
-
40549122135
-
Recent issues in negative-bias temperature instability: Initial degradation field dependence of interface trap generation, hole trapping effects, and relaxation
-
Sep
-
A. E. Islam, H. Kufluoglu, D. Varghese, S. Mahapatra, and M. A. Alam, "Recent issues in negative-bias temperature instability: Initial degradation field dependence of interface trap generation, hole trapping effects, and relaxation," IEEE Trans. Electron Devices, vol. 54, no. 9, pp. 2143-2154, Sep. 2007.
-
(2007)
IEEE Trans. Electron Devices
, vol.54
, Issue.9
, pp. 2143-2154
-
-
Islam, A.E.1
Kufluoglu, H.2
Varghese, D.3
Mahapatra, S.4
Alam, M.A.5
-
4
-
-
21644472788
-
Influence of nitrogen in ultra-thin SiON on negative bias temperature instability under AC stress
-
Y. Mitani, "Influence of nitrogen in ultra-thin SiON on negative bias temperature instability under AC stress," in IEDM Tech. Dig., 2004, pp. 117-120.
-
(2004)
IEDM Tech. Dig
, pp. 117-120
-
-
Mitani, Y.1
-
5
-
-
43549114401
-
-
M. A. Alam, A critical examination of the mechanics of dynamic NBTI for PMOSFETs, in IEDM Tech. Dig., 2003, pp. 14.4.1-14.4.4.
-
M. A. Alam, "A critical examination of the mechanics of dynamic NBTI for PMOSFETs," in IEDM Tech. Dig., 2003, pp. 14.4.1-14.4.4.
-
-
-
-
6
-
-
0031647690
-
An analytical method of evaluating variation of the threshold voltage shift caused by the negative-bias temperature stress in poly-Si TFTs
-
Jan
-
S. Maeda, S. Maegawa, T. Ipposhi, H. Kuriyama, M. Ashida, Y. Inoue, H. Miyoshi, and A. Yasuoka, "An analytical method of evaluating variation of the threshold voltage shift caused by the negative-bias temperature stress in poly-Si TFTs," IEEE Trans. Electron Devices, vol. 45, no. 1, pp. 165-172, Jan. 1998.
-
(1998)
IEEE Trans. Electron Devices
, vol.45
, Issue.1
, pp. 165-172
-
-
Maeda, S.1
Maegawa, S.2
Ipposhi, T.3
Kuriyama, H.4
Ashida, M.5
Inoue, Y.6
Miyoshi, H.7
Yasuoka, A.8
-
7
-
-
0020089602
-
Conductivity behavior in polycrystalline semiconductor thin film transistors
-
Feb
-
J. Levinson, F. R. Shepherd, P. J. Scanlon, W. D. Westwood, G. Este, and M. Rider, "Conductivity behavior in polycrystalline semiconductor thin film transistors," J. Appl. Phys., vol. 53, no. 2, pp. 1193-1202, Feb. 1982.
-
(1982)
J. Appl. Phys
, vol.53
, Issue.2
, pp. 1193-1202
-
-
Levinson, J.1
Shepherd, F.R.2
Scanlon, P.J.3
Westwood, W.D.4
Este, G.5
Rider, M.6
-
8
-
-
0024739568
-
Development and electrical properties of undoped polycrystalline silicon thin-film transistors
-
Sep
-
R. E. Proano, R. S. Misage, and D. G. Ast, "Development and electrical properties of undoped polycrystalline silicon thin-film transistors," IEEE Trans. Electron Devices, vol. 36, no. 9, pp. 1915-1922, Sep. 1989.
-
(1989)
IEEE Trans. Electron Devices
, vol.36
, Issue.9
, pp. 1915-1922
-
-
Proano, R.E.1
Misage, R.S.2
Ast, D.G.3
-
9
-
-
36449006382
-
Effective density-of-states distributions for accurate modeling of polycrystalline-silicon thin-film transistors
-
Jan
-
T. J. King, M. G. Hack, and I. W. Wu, "Effective density-of-states distributions for accurate modeling of polycrystalline-silicon thin-film transistors," J. Appl. Phys., vol. 75, no. 2, pp. 908-913, Jan. 1994.
-
(1994)
J. Appl. Phys
, vol.75
, Issue.2
, pp. 908-913
-
-
King, T.J.1
Hack, M.G.2
Wu, I.W.3
-
10
-
-
0026835667
-
Performance of thin-film transistors on polysilicon films grown by low-pressure chemical vapor deposition at various pressures
-
Mar
-
C. A. Dimitriadis, P. A. Coxon, L. Dozsa, L. Papadimitriou, and N. Economou, "Performance of thin-film transistors on polysilicon films grown by low-pressure chemical vapor deposition at various pressures," IEEE Trans. Electron Devices, vol. 39, no. 3, pp. 598-606, Mar. 1992.
-
(1992)
IEEE Trans. Electron Devices
, vol.39
, Issue.3
, pp. 598-606
-
-
Dimitriadis, C.A.1
Coxon, P.A.2
Dozsa, L.3
Papadimitriou, L.4
Economou, N.5
-
11
-
-
0030241288
-
Threshold voltage, field effect mobility, and gate-to-channel capacitance in polysilicon TFTs
-
Sep
-
M. D. Jacunski, M. S. Shur, and M. Hack, "Threshold voltage, field effect mobility, and gate-to-channel capacitance in polysilicon TFTs," IEEE Trans. Electron Devices, vol. 43, no. 9, pp. 1433-1440, Sep. 1996.
-
(1996)
IEEE Trans. Electron Devices
, vol.43
, Issue.9
, pp. 1433-1440
-
-
Jacunski, M.D.1
Shur, M.S.2
Hack, M.3
-
12
-
-
0028483497
-
New technique for the characterization of Si/SiGe, layers using heterostructure MOS capacitors
-
S. P. Voinigescu, K. Iniewski, R. Lisak, C. A. T. Salama, J.-P. Noel, and D. C. Houghton, "New technique for the characterization of Si/SiGe, layers using heterostructure MOS capacitors," Solid State Electron. vol. 37, no. 8, pp. 1491-1501, 1994.
-
(1994)
Solid State Electron
, vol.37
, Issue.8
, pp. 1491-1501
-
-
Voinigescu, S.P.1
Iniewski, K.2
Lisak, R.3
Salama, C.A.T.4
Noel, J.-P.5
Houghton, D.C.6
-
13
-
-
0041513287
-
C-V characterization of strained Si/SiGe multiple heterojunction capacitors as a tool for heterojunction MOSFET channel design
-
Aug
-
S. Chattopadhyay, K. S. K. Kwa, S. H. Olsen, L. S. Driscoll, and A. G. O'Neil, "C-V characterization of strained Si/SiGe multiple heterojunction capacitors as a tool for heterojunction MOSFET channel design," Semicond. Sci. Technol., vol. 18, no. 8, pp. 738-744, Aug. 2003.
-
(2003)
Semicond. Sci. Technol
, vol.18
, Issue.8
, pp. 738-744
-
-
Chattopadhyay, S.1
Kwa, K.S.K.2
Olsen, S.H.3
Driscoll, L.S.4
O'Neil, A.G.5
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