A hardware design of a massive-parallel, modular NN-based vector quantizer for real-time video coding

Microprocessors and Microsystems

Volumn 32, Issue 1, 2008, Pages 33-44

  Ramirez Agundis, Agustin ^a   Gadea Girones, Rafael ^b   Colom Palero, Ricardo ^b  

^a DEPARTAMENTO DE INGENIERÍA QUÍMICA   (Mexico)

^b UNIVERSITAT POLITÈCNICA DE VALÈNCIA   (Spain)

Author keywords

Field programmable gate array; Hardware implementation; Neural network; Self organizing map; Vector quantization; Video compression

Indexed keywords

FINITE AUTOMATA; IMAGE CODING; REAL TIME SYSTEMS; SELF ORGANIZING MAPS; SEMICONDUCTOR DEVICES;

FIELD PROGRAMMABLE GATE ARRAYS; HARDWARE IMPLEMENTATION; MACHINE BASED HARD CONTROLLERS; REAL TIME IMAGE CODING;

VECTOR QUANTIZATION;

EID: 42649090121     PISSN: 01419331     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.micpro.2007.06.004     Document Type: Article

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