Hardware accelerated data analysis

International Conference on Parallel Computing in Electrical Engineering: Workshop on System Design Automation, SDA, PARELEC 2004

Volumn , Issue , 2004, Pages 309-314

  Franzmeier, Marc ^a   Pohl, Christopher ^a   Porrmann, Mario ^a   Rückert, Ulrich ^a  

^a UNIVERSITY OF PADERBORN   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

DATA MINING; DATA REDUCTION; FIELD PROGRAMMABLE GATE ARRAYS; NEURAL NETWORKS; PROCESS ENGINEERING; SELF ORGANIZING MAPS;

DATASETS; PROCESSING ELEMENTS (PE); SOFTWARE IMPLEMENTATION; VIRTUAL MAPS;

COMPUTER HARDWARE;

EID: 13944275207     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)

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