Design methodology of Miller frequency compensation with current buffer/amplifier

IET Circuits, Devices and Systems

Volumn 2, Issue 2, 2008, Pages 227-233

  Aloisi, W ^a   Palumbo, G ^a   Pennisi, S ^a  

^a UNIVERSITY OF CATANIA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; CIRCUIT SIMULATION; INTEGRATED CIRCUIT LAYOUT; TRANSCONDUCTANCE; VOLTAGE CONTROL;

MILLER COMPENSATION CAPACITORS; TRANSCONDUCTANCE AMPLIFIERS; TWO-STAGE AMPLIFIERS;

AMPLIFIERS (ELECTRONIC);

EID: 42149125475     PISSN: 1751858X     EISSN: None     Source Type: Journal    
DOI: 10.1049/iet-cds:20060188     Document Type: Article

References (22)

1. Huijsing, J.: ' Operational amplifiers: theory and design ', (Kluwer Academic Publishers, 2001)
2. Jolly, R.: ' A low-noise amplifier for switched-capacitor filters ', IEEE J. Solid-State Circuits, 1982, 17, (6), p. 1192-1194 10.1109/JSSC.1982.1051879 0018-9200
3. Ahuja, B.: ' An improved frequency compensation technique for CMOS operational amplifiers ', IEEE J. Solid-State Circuits, 1983, 18, (6), p. 629-633 10.1109/JSSC.1983.1052012 0018-9200
4. Ribner, D., and Copeland, M.: ' Design techniques for cascoded CMOS op amps with improved PSRR and common-mode input range ', IEEE J. Solid-State Circuits, 1984, 19, (6), p. 919-925 10.1109/JSSC.1984.1052246 0018-9200
5. Steyaert, M., and Sansen, W.: ' Power supply rejection ratio in operational transconductance amplifier ', IEEE J. Solid-State Circuits, 2002, 37, (9), p. 1077-1084 0018-9200
6. Sackinger, E., Goette, J., and Guggenbuhl, W.: ' A general relationship between amplifier parameters and its application to PSRR improvement ', IEEE Trans. Circuits Syst., 1991, 38, (10), p. 1173-1181 10.1109/31.97537 0098-4094
7. Palmisano, G., and Palumbo, G.: ' A compensation strategy for two-stage CMOS op amp based on current buffer ', IEEE Trans. Circuits Syst. I, 1997, 44, (3), p. 257-262 10.1109/81.557376 1057-7122
8. Mahattanakull, J.: ' Design procedure for two-stage CMOS operational amplifiers employing current buffer ', IEEE Trans. Circuits Syst. II, 2005, 52, (11), p. 766-770 1057-7130
9. Castello, R.: ' CMOS buffer amplifier ', Huijsing, J., van der Plassche, R., Sansen, W., Analog circuit design, (Kluwer Academic Publishers, 1993), p. 113-138
10. Reay, R., and Kovacs, G.: ' An unconditionally stable two-stage CMOS amplifier ', IEEE J. Solid-State Circuits, 1995, 30, (5), p. 591-594 10.1109/4.384174 0018-9200
11. Mita, R., Palumbo, G., and Pennisi, S.: ' Design guidelines for reversed nested Miller compensation ', IEEE Trans. Circuits Syst. II, 2003, 50, (5), p. 227-233 10.1109/TCSII.2003.811437 1057-7130
12. Rincon-Mora, G.: ' Active capacitor multiplier in Miller-compensated circuits ', IEEE J. Solid-State Circuits, 2000, 35, (1), p. 26-32 0018-9200
13. Hurst, P., Lewis, S., and Keane, J.: et al. ' Miller compensation using current buffers in fully differential CMOS two-stage operational amplifiers ', IEEE Trans. Circuits Syst. I, 2004, 51, (2), p. 275-285 10.1109/TCSI.2003.820254 1057-7122
14. Palmisano, G., Palumbo, G., and Pennisi, S.: ' Design procedures for two-stage CMOS OTAs: a tutorial ', Analog Integr. Circuits Signal Process., 2001, 27, (3), p. 179-189 0925-1030
15. Cannizzaro, S.O., Grasso, A.D., and Mita, R.: et al. ' Design procedures for three-sage CMOS OTAs with nested-Miller compensation ', IEEE Trans. Circuits Syst. I, 2007, 54, (5), p. 933-940 1057-7122
16. Hurst, P., and Lewis, S.: ' Determination of stability using return ratios in balanced fully differential feedback circuits ', IEEE Trans. Circuits Syst. II, 1995, 42, (12), p. 805-817 10.1109/82.476178 1057-7130
17. Pernici, S., Nicollini, G., and Castello, R.: ' A CMOS low distortion fully differential power amplifier with double nested miller compensation ', IEEE J. Solid-State Circuits, 1993, 28, (7), p. 758-763 10.1109/4.222173 0018-9200
18. Palumbo, G., and Pennisi, S.: ' Design methodology and advances in nested-miller compensation ', IEEE Trans. Circuits Syst. I, 2002, 49, (7), p. 893-902 10.1109/TCSI.2002.800463 1057-7122
19. Palumbo, G., and Pennisi, S.: ' Feedback ampilfiers: theory and design ', (Kluwer Academic Publishers, 2002)
20. Rosenstark, S.: ' A simplified method of feedback amplifier analysis ', IEEE Trans. Educ., 1974, 17, (4), p. 192-198 0018-9359
21. Aloisi, W., Giustolisi, G., and Palumbo, G.: ' Design and comparison of very low-voltage CMOS output stages ', IEEE Trans. Circuits Syst. I, 2005, 52, (8), p. 1545-1556 1057-7122
22. Pennisi, S.: ' CMOS Multiplier for grounded capacitors ', Electron Lett., 2002, 38, (15), p. 765-766 10.1049/el:20020517 0013-5194