Design and comparison of very low-voltage CMOS output stages

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 52, Issue 8, 2005, Pages 1545-1556

  Aloisi, Walter ^a   Giustolisi, Gianluca ^a   Palumbo, Gaetano ^a  

^a UNIVERSITY OF CATANIA   (Italy)

Author keywords

Analog integrated circuits; CMOS analog circuits; Low voltage; Operational amplifiers; Output stages

Indexed keywords

COMPUTER SIMULATION; ELECTRIC CURRENTS; ELECTRIC POTENTIAL; INTEGRATED CIRCUIT LAYOUT; MOSFET DEVICES; OPERATIONAL AMPLIFIERS;

CMOS ANALOG INTEGRATED CIRCUITS; LOW VOLTAGE OPERATIONAL AMPLIFIERS;

CMOS INTEGRATED CIRCUITS;

EID: 26444580203     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2005.852005     Document Type: Article

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