Active capacitor multiplier in Miller-compensated circuits

IEEE Journal of Solid-State Circuits

Volumn 35, Issue 1, 2000, Pages 26-32

  Rincon Mora, Gabriel A ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); BIPOLAR INTEGRATED CIRCUITS; CAPACITANCE; CMOS INTEGRATED CIRCUITS; ELECTRIC CURRENTS; ELECTRIC LOADS; ELECTRIC RESISTANCE; MULTIPLYING CIRCUITS;

ACTIVE CAPACITOR MULTIPLIERS; MILLER-COMPENSATED TWO-STAGE AMPLIFIERS;

CAPACITORS;

EID: 0033873969     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.818917     Document Type: Article

References (7)

1. A. S. Sedra and K. C. Smith, Microelectronic Circuits. New York, NY: Holt, Rinehart, Winston, 1987.
2. P. R. Gray and R. G. Meyer, Analysis and Design of Analog Integrated Circuits. New York, NY: Wiley, 1993.
3. M. Ingels and M. S. J. Steyaert, "Design strategies and decoupling techniques for reducing the effects of electrical interference in mixed-mode 1C's," IEEE J. Solid-State Circuits, vol. 32, pp. 1136-1141, July 1997.
4. R. Cavin and W. Liu, Emerging Technologies, Designing Low Power Digital Systems. Piscataway, NJ: IEEE Press, 1996.
5. G. A. Rincon-Mora and P. E. Allen, "A low voltage, low quiescent current, low drop-out regulator," IEEE J. Solid-State Circuits, vol. 33, pp. 36-44, Jan. 1998.
6. M. Kay, "Design and analysis of an LDO voltage regulator with a PMOS power device," Texas Instruments, Dallas, TX, Tech. Rep., to be published.
7. B. C. Kuo, Automatic Control Systems. Englewood Cliffs, NJ: Prentice-Hall, 1991.