LOCOS-induced stress effects on thin-film SOI devices

IEEE Transactions on Electron Devices

Volumn 44, Issue 4, 1997, Pages 646-650

  Huang, Cheng Liang ^a,c   Soleimani, Hamid R ^a,c   Grula, Gregory J ^a,c   Sleight, Jeffrey W ^a,c   Villani, Angelo ^a   Ali, Hassan ^a   Antoniadis, Dimitri A ^b,c  

^a HEWLETT PACKARD COMPANY   (United States)

^b MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

^c IEEE   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CURRENT VOLTAGE CHARACTERISTICS; ION IMPLANTATION; MOSFET DEVICES; OXIDATION; OXIDES; SCANNING ELECTRON MICROSCOPY; SEMICONDUCTING FILMS; SEMICONDUCTOR DEVICE MANUFACTURE; THIN FILM DEVICES;

COBALT SALICIDE PROCESSING; FOUR POINT BENDING MEASUREMENT; PARAMETER ANALYZER;

SILICON ON INSULATOR TECHNOLOGY;

EID: 0031120282     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.563370     Document Type: Article

References (9)

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3. C.-L. Huang, H. R. Soleimani, G. Grula, N. Arora, J. Sleight, and D. Antoniadis, "LOCOS process-induced stress effect on CMOS SOI characteristics," in Proc. IEEE Int. SOI Conf., 1996, p. 82.
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