-
1
-
-
38949184984
-
Fast Transforms Algorithms, Analysis, Applications
-
Chapter 8, Prentice-Hall
-
Elliott, D. F., Kao K. R., "Fast Transforms Algorithms, Analysis, Applications," Chapter 8, Walsh-Hadamard Transform, Prentice-Hall, 1982, pp. 301-303.
-
(1982)
Walsh-Hadamard Transform
, pp. 301-303
-
-
Elliott, D.F.1
Kao, K.R.2
-
2
-
-
0019634457
-
Relation between the Karhenen Loeve and Cosine Transform
-
Nov
-
Clarke, R. J., "Relation between the Karhenen Loeve and Cosine Transform," IEEE Proceedings, Part F, Vol. 128, No. 6, Nov. 1981, pp. 359-360.
-
(1981)
IEEE Proceedings, Part F
, vol.128
, Issue.6
, pp. 359-360
-
-
Clarke, R.J.1
-
3
-
-
0017981049
-
On the Computation of the Discrete Cosine Transform
-
June
-
Narasimha, M. J., Peterson, A. M., "On the Computation of the Discrete Cosine Transform," IEEE Transactions on Communications, Vol. 26, No. 6, June 1978, pp. 934-936.
-
(1978)
IEEE Transactions on Communications
, vol.26
, Issue.6
, pp. 934-936
-
-
Narasimha, M.J.1
Peterson, A.M.2
-
4
-
-
0016974761
-
A Storage Way to Implement the Discrete Cosine Transform
-
July
-
R. M.Haralick "A Storage Way to Implement the Discrete Cosine Transform," IEEE Transactions on Computers, July 1976, pp. 764-765.
-
(1976)
IEEE Transactions on Computers
, pp. 764-765
-
-
Haralick, R.M.1
-
5
-
-
0017538003
-
Fast Computational Algorithm for the Discrete Cosine Transform
-
Sept
-
W. H. Chen, C. H. Smith, S. C. Fralick, "Fast Computational Algorithm for the Discrete Cosine Transform," IEEE Transactions on Communications, Vol. 25, No. 9, Sept. 1977,pp.1004-1009.
-
(1977)
IEEE Transactions on Communications
, vol.25
, Issue.9
, pp. 1004-1009
-
-
Chen, W.H.1
Smith, C.H.2
Fralick, S.C.3
-
6
-
-
38949117291
-
VLSI Parallel and Distributed Computation Algorithms for DCT Processors
-
Scottsdale, Arizona, USA
-
T. Y. Sung, "VLSI Parallel and Distributed Computation Algorithms for DCT Processors," Proceedings IEEE International Phoenix Conference on Computer and Communications, Scottsdale, Arizona, USA, 1990, pp.121-125.
-
(1990)
Proceedings IEEE International Phoenix Conference on Computer and Communications
, pp. 121-125
-
-
Sung, T.Y.1
-
7
-
-
0025263388
-
VLSI Parallel and Distributed Processing Algorithms for Multidimensional Discrete Cosine Transforms
-
Miami Beach, Florida, USA, March
-
T. Y. Sung, "VLSI Parallel and Distributed Processing Algorithms for Multidimensional Discrete Cosine Transforms," 1990 A Two-Track International Conference on Databases, Parallel Architectures, and their Applications, Miami Beach, Florida, USA, March 1990, pp. 36-39.
-
(1990)
1990 A Two-Track International Conference on Databases, Parallel Architectures, and their Applications
, pp. 36-39
-
-
Sung, T.Y.1
-
8
-
-
38949117982
-
Novel Parallel VLSI Architectures for Discrete Cosine Transforms
-
Albuquerque, New Mexico, USA, April
-
T. Y. Sung, "Novel Parallel VLSI Architectures for Discrete Cosine Transforms," Proceedings IEEE International Conference on Acoustics, Speech and Signal Processing, Albuquerque, New Mexico, USA, April 1990, pp.998-1001.
-
(1990)
Proceedings IEEE International Conference on Acoustics, Speech and Signal Processing
, pp. 998-1001
-
-
Sung, T.Y.1
-
9
-
-
0031168228
-
A Cost-Effective Architecture for 8×8 two-dimensional DCT/IDCT Using Direct Method
-
June
-
Y. P. Lee, T. H. Chen, L. G. Chen, C. W. Ku, " A Cost-Effective Architecture for 8×8 two-dimensional DCT/IDCT Using Direct Method," IEEE Transactions on Circuits Systems for Video Technology, Vol. 7, No. 1, June 1997, pp. 459-467.
-
(1997)
IEEE Transactions on Circuits Systems for Video Technology
, vol.7
, Issue.1
, pp. 459-467
-
-
Lee, Y.P.1
Chen, T.H.2
Chen, L.G.3
Ku, C.W.4
-
10
-
-
0029291183
-
New Systolic Array Implementation of the 2-D Discrete Cosine Transform and Its Inverse
-
April
-
Y. T. Chang, C. L. Wang, "New Systolic Array Implementation of the 2-D Discrete Cosine Transform and Its Inverse," IEEE Transactions on Circuits Systems for Video Technology, Vol. 5, No. 1, April 1995, pp. 150-157.
-
(1995)
IEEE Transactions on Circuits Systems for Video Technology
, vol.5
, Issue.1
, pp. 150-157
-
-
Chang, Y.T.1
Wang, C.L.2
-
11
-
-
0035509467
-
A New Hardware-Efficient Algorithm and Architecture for Computation of 2-D DCTs on a Linear Array
-
Nov
-
S. F. Hsiao, W. R. Shiue, "A New Hardware-Efficient Algorithm and Architecture for Computation of 2-D DCTs on a Linear Array," IEEE Transactions on Circuits and Systems for Video Technology, Vol. 11, Nov. 2001, pp.1149-1159.
-
(2001)
IEEE Transactions on Circuits and Systems for Video Technology
, vol.11
, pp. 1149-1159
-
-
Hsiao, S.F.1
Shiue, W.R.2
-
12
-
-
0036544024
-
New Matrix Formulation for Two-Dimensional DCT/IDCT Computation and its Distributed-Memory VLSI Implementation
-
April
-
S. F. Hsiao, J. M. Tseng, "New Matrix Formulation for Two-Dimensional DCT/IDCT Computation and its Distributed-Memory VLSI Implementation," IEE Proc.-Vis. Image Signal Process, Vol. 149, No. 2, April 2002, pp. 97-107.
-
(2002)
IEE Proc.-Vis. Image Signal Process
, vol.149
, Issue.2
, pp. 97-107
-
-
Hsiao, S.F.1
Tseng, J.M.2
-
13
-
-
0030083342
-
VLSI Design of High-Speed Time-Recursive 2-D DCT/IDCT Processor for Video Applications
-
Feb
-
V. Srinvasan, K. J. R. Liu, "VLSI Design of High-Speed Time-Recursive 2-D DCT/IDCT Processor for Video Applications," IEEE Transactions on Circuits Systems for Video Technology, Vol. 6, No. 1, Feb. 1996, pp. 87-96.
-
(1996)
IEEE Transactions on Circuits Systems for Video Technology
, vol.6
, Issue.1
, pp. 87-96
-
-
Srinvasan, V.1
Liu, K.J.R.2
-
14
-
-
0030285492
-
2, 2-D Discrete Cosine Transform Core Processor with Variable Threshold-Voltage(VT) Scheme
-
Nov
-
2, 2-D Discrete Cosine Transform Core Processor with Variable Threshold-Voltage(VT) Scheme," IEEE Journal of Solid-States Circuits, Vol. 31, No. 11, Nov. 1996, pp.1770-1778.
-
(1996)
IEEE Journal of Solid-States Circuits
, vol.31
, Issue.11
, pp. 1770-1778
-
-
Kuroda, T.1
-
15
-
-
0031636938
-
A 35 μ W 1.1 V Gate Array 8×8 IDCT Processor for Video-Telephony
-
R. Rambaldi, A. Uguzzoni, R. Guerrieri, "A 35 μ W 1.1 V Gate Array 8×8 IDCT Processor for Video-Telephony," Proceedings IEEE International Conference on Acoustics, Speech and Signal Processing, 1998, pp.2993-2996.
-
(1998)
Proceedings IEEE International Conference on Acoustics, Speech and Signal Processing
, pp. 2993-2996
-
-
Rambaldi, R.1
Uguzzoni, A.2
Guerrieri, R.3
-
16
-
-
0032653934
-
A Cost-Effective 8×8 2-D IDCT Core Processor with Folded Architecture
-
May
-
T. H. Chen, "A Cost-Effective 8×8 2-D IDCT Core Processor with Folded Architecture," IEEE Transactions on Consumer Electronics, Vol. 45, No.2, May 1999, pp.333-339.
-
(1999)
IEEE Transactions on Consumer Electronics
, vol.45
, Issue.2
, pp. 333-339
-
-
Chen, T.H.1
-
17
-
-
38949139490
-
A Novel Implementation of Cost-Effective Parallel- Pipelined 8×8 DCT Processor
-
Fukuoka, Japan, August 3-5
-
T. Y. Sung, Y. H. Sung, "A Novel Implementation of Cost-Effective Parallel- Pipelined 8×8 DCT Processor," The Fourth IEEE Asia-Pacific Conference on Advanced System Integrated Circuits (AP-ASIC) 2004, Fukuoka, Japan, August 3-5, 2004, pp.200-203.
-
(2004)
The Fourth IEEE Asia-Pacific Conference on Advanced System Integrated Circuits (AP-ASIC) 2004
, pp. 200-203
-
-
Sung, T.Y.1
Sung, Y.H.2
-
18
-
-
0029184480
-
An Efficient CORDIC Array Structure for the Implementation of Discrete Cosine Transform
-
Jan
-
Y. H. Hu, Z. Wu, "An Efficient CORDIC Array Structure for the Implementation of Discrete Cosine Transform", IEEE Transactions on Signal Processing, Vol. 43,No. 1.Jan. 1995, pp.331-336.
-
(1995)
IEEE Transactions on Signal Processing
, vol.43
, Issue.1
, pp. 331-336
-
-
Hu, Y.H.1
Wu, Z.2
-
19
-
-
1942519780
-
Low-Power Multiplierless DCT Architecture Using Image Data Correlation
-
Feb
-
H. Jeong, J. Kim, W. K. Cho, "Low-Power Multiplierless DCT Architecture Using Image Data Correlation," IEEE Transactions on Consumer Electronics, Vol. 50, No. 1, Feb. 2004, pp.262-267.
-
(2004)
IEEE Transactions on Consumer Electronics
, vol.50
, Issue.1
, pp. 262-267
-
-
Jeong, H.1
Kim, J.2
Cho, W.K.3
-
20
-
-
2042436420
-
New Cost-Effective VLSI Implementation of a 2-D Discrete Cosine Transform and Its Inverse
-
April
-
D. Gong, Y. He, Z. Gao, "New Cost-Effective VLSI Implementation of a 2-D Discrete Cosine Transform and Its Inverse", IEEE Transactions on Circuits and Systems for Video Technology, Vol. 14, No. 4, April 2004, pp. 405-415.
-
(2004)
IEEE Transactions on Circuits and Systems for Video Technology
, vol.14
, Issue.4
, pp. 405-415
-
-
Gong, D.1
He, Y.2
Gao, Z.3
-
21
-
-
6444222196
-
Multiplication-Free 8×8 2D DCT Architecture Using Algebraic Integer Encoding
-
30th Sept
-
V. Dimitrov, K. Wahid, G. Jullien, "Multiplication-Free 8×8 2D DCT Architecture Using Algebraic Integer Encoding", Electronics Letters, Vol. 40, No. 20, 30th Sept. 2004.
-
(2004)
Electronics Letters
, vol.40
, Issue.20
-
-
Dimitrov, V.1
Wahid, K.2
Jullien, G.3
-
22
-
-
18844412777
-
A New Time Distributed DCT Architecture for MPEG-4 Hardware Reference Model
-
May
-
M. Alam, W. Badawy, G. Jullien, "A New Time Distributed DCT Architecture for MPEG-4 Hardware Reference Model", IEEE Transactions on Circuits and Systems for Video Technology, Vol. 15, No. 5, May 2005, pp.726-730.
-
(2005)
IEEE Transactions on Circuits and Systems for Video Technology
, vol.15
, Issue.5
, pp. 726-730
-
-
Alam, M.1
Badawy, W.2
Jullien, G.3
-
23
-
-
84919346176
-
The CORDIC Trigonometric Computing Technique
-
J. E. Volder, "The CORDIC Trigonometric Computing Technique," IRE Transactions on Electronic Computers, Vol. EC-8, 1959, pp. 330-334.
-
(1959)
IRE Transactions on Electronic Computers
, vol.EC-8
, pp. 330-334
-
-
Volder, J.E.1
-
25
-
-
0025888014
-
Expanding the range of the Convergence of the CORDIC Algorithm
-
X. Hu, R. G. Harber, S. C. Bass, "Expanding the range of the Convergence of the CORDIC Algorithm", IEEE Transactions on Computers, Vol. 40, No. 1, 1991, pp.13-21.
-
(1991)
IEEE Transactions on Computers
, vol.40
, Issue.1
, pp. 13-21
-
-
Hu, X.1
Harber, R.G.2
Bass, S.C.3
-
27
-
-
38949093554
-
A Memory-Efficient and High-Speed Split-Radix FFT/IFFT Processor Based on Pipelined CORDIC Rotations
-
to appear in
-
T. Y. Sung, "A Memory-Efficient and High-Speed Split-Radix FFT/IFFT Processor Based on Pipelined CORDIC Rotations," to appear in IEE Proceedings - Vision, Image and Signal Processing.
-
IEE Proceedings - Vision, Image and Signal Processing
-
-
Sung, T.Y.1
-
28
-
-
34548794427
-
The Double Rotation CORDIC Algorithm: New Results for VLSI Implementation of Fast Sine/Cosine Generation
-
Taipei, Taiwan, Dec. 15-17
-
T. Y. Sung, C. S. Chen, M. C. Shih, "The Double Rotation CORDIC Algorithm: New Results for VLSI Implementation of Fast Sine/Cosine Generation," 2004 International Computer Symposium (ICS-2004), Taipei, Taiwan, Dec. 15-17, 2004, pp.1285-1290.
-
(2004)
2004 International Computer Symposium (ICS-2004)
, pp. 1285-1290
-
-
Sung, T.Y.1
Chen, C.S.2
Shih, M.C.3
-
29
-
-
38949183026
-
-
TSMC 0.18 μm CMOS Design Libraries and Technical Data, v.3.2, Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan, and National Chip Implementation Center (CIC), National Science Council, Hsinchu, Taiwan, R.O.C., 2006.
-
"TSMC 0.18 μm CMOS Design Libraries and Technical Data, v.3.2," Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan, and National Chip Implementation Center (CIC), National Science Council, Hsinchu, Taiwan, R.O.C., 2006.
-
-
-
-
30
-
-
38949216741
-
-
Synopsys products, http://www. synopsys.com/products.
-
Synopsys products, http://www. synopsys.com/products.
-
-
-
|