Run-time services for hybrid CPU/FPGA systems on chip

Proceedings - Real-Time Systems Symposium

Volumn , Issue , 2006, Pages 3-12

  Agron, Jason ^a   Peck, Wesley ^a   Anderson, Erik ^a   Andrews, David ^a   Komp, Ed ^a   Sass, Ron ^a   Baijot, Fabrice ^a   Stevens, Jim ^a  

^a UNIVERSITY OF KANSAS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

HARDWARE CIRCUITS; MULTIPROCESSOR SYSTEMS-ON-PROGRAMMABLE CHIP (MPSOPC); THREAD MANAGEMENT;

COMPUTER HARDWARE; DIES; JITTER; MICROPROCESSOR CHIPS; PROGRAM PROCESSORS; SCHEDULING; SILICON; SYNCHRONIZATION;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 38949167744     PISSN: 10528725     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RTSS.2006.45     Document Type: Conference Paper

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