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Volumn 43, Issue 2, 2008, Pages 414-423

A sub-picosecond resolution 0.5-1.5 GHz digital-to-phase converter

Author keywords

Delay locked loop (DLL); Delta sigma modulation; Digital to phase converter; Glitch free phase switching; Noise shaping; Phase filter; Phase interpolation; Phase locked loop (PLL)

Indexed keywords

CMOS INTEGRATED CIRCUITS; DELTA SIGMA MODULATION; MODULATORS; NATURAL FREQUENCIES; PHASE LOCKED LOOPS;

EID: 38849197525     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2007.914287     Document Type: Article
Times cited : (50)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.