-
1
-
-
0003626435
-
-
(Prentice-Hall, Inc., NJ)
-
Conzalez, R.C., and Woods, R.E.: ' Digital image processing ', (Prentice-Hall, Inc., NJ, 2001)
-
(2001)
Digital Image Processing
-
-
Conzalez, R.C.1
Woods, R.E.2
-
4
-
-
0029748249
-
Low power design of two-dimensional DCT
-
Li, J., and Lu, S.L.: ' Low power design of two-dimensional DCT ', IEEE Conf. on ASIC and Exhibit, 1996, p. 309-312
-
(1996)
IEEE Conf. on ASIC and Exhibit
, pp. 309-312
-
-
Li, J.1
Lu, S.L.2
-
5
-
-
2642588091
-
Low power design of DCT and IDCT for low bit rate video codecs
-
August, N.J., and Ha, D.S.: ' Low power design of DCT and IDCT for low bit rate video codecs ', IEEE Trans. Multimedia, 2004, 6, (3), p. 414-422
-
(2004)
IEEE Trans. Multimedia
, vol.6
, Issue.3
, pp. 414-422
-
-
August, N.J.1
Ha, D.S.2
-
6
-
-
19244382355
-
Low power reconfigurable DCT design based on sharing multiplication
-
Park, J., Kwon, S., and Roy, K.: ' Low power reconfigurable DCT design based on sharing multiplication ', IEEE Int. Conf. on Acoustics, Speech, and Signal Processing, 2002, 3, p. III3116-III3119
-
(2002)
IEEE Int. Conf. on Acoustics, Speech, and Signal Processing
, vol.3
-
-
Park, J.1
Kwon, S.2
Roy, K.3
-
7
-
-
0000194406
-
A low-power DCT core using adaptive bitwidth and arithmetic activity exploiting signal correlations and quantization
-
0018-9200
-
Xanthopoulos, T., and Chandrakasan, A.P.: ' A low-power DCT core using adaptive bitwidth and arithmetic activity exploiting signal correlations and quantization ', IEEE J. Solid-State Circuits, 2000, 35, (5), p. 740-750 0018-9200
-
(2000)
IEEE J. Solid-State Circuits
, vol.35
, Issue.5
, pp. 740-750
-
-
Xanthopoulos, T.1
Chandrakasan, A.P.2
-
8
-
-
85013917280
-
A high-performance low-power asynchronous matrix-vector multiplier for discrete cosine transform
-
Kim, K., and Beerel, P.A.: ' A high-performance low-power asynchronous matrix-vector multiplier for discrete cosine transform ', IEEE Asia Pacific Conf. on ASICs, 1999, p. 135-138
-
(1999)
IEEE Asia Pacific Conf. on ASICs
, pp. 135-138
-
-
Kim, K.1
Beerel, P.A.2
-
9
-
-
1942519780
-
Low-power multiplierless DCT architecture using image correlation
-
0098-3063
-
Jeong, H., Kim, J., and Cho, W.K.: ' Low-power multiplierless DCT architecture using image correlation ', IEEE Trans. Consumer Electron., 2004, 50, (1), p. 262-267 0098-3063
-
(2004)
IEEE Trans. Consumer Electron.
, vol.50
, Issue.1
, pp. 262-267
-
-
Jeong, H.1
Kim, J.2
Cho, W.K.3
-
10
-
-
84948672235
-
A low power high performance distributed DCT architecture
-
Shams, A., Pan, W., Chidanandan, A., and Bayoumi, M.A.: ' A low power high performance distributed DCT architecture ', IEEE Computer Society Annual Symp. on VLSI, 2002, p. 21-27
-
(2002)
IEEE Computer Society Annual Symp. on VLSI
, pp. 21-27
-
-
Shams, A.1
Pan, W.2
Chidanandan, A.3
Bayoumi, M.A.4
-
11
-
-
27944480551
-
Data driven VLSI computation for low power DCT-based video coding
-
Fanucci, L., and Saponara, S.: ' Data driven VLSI computation for low power DCT-based video coding ', Int. Conf. on Electronics, Circuits and Systems, 2002, p. 541-544
-
(2002)
Int. Conf. on Electronics, Circuits and Systems
, pp. 541-544
-
-
Fanucci, L.1
Saponara, S.2
-
12
-
-
0017538003
-
A fast computational algorithm for the discrete cosine transform
-
0090-6778
-
Chen, W.H., Smith, C., and Fralick, S.: ' A fast computational algorithm for the discrete cosine transform ', IEEE Trans. Commun., 1977, 25, (9), p. 1004-1009 0090-6778
-
(1977)
IEEE Trans. Commun.
, vol.25
, Issue.9
, pp. 1004-1009
-
-
Chen, W.H.1
Smith, C.2
Fralick, S.3
-
13
-
-
0021473509
-
Fast algorithms for the discrete W transform and for the discrete Fourier transform
-
0096-3518
-
Wang, Z.: ' Fast algorithms for the discrete W transform and for the discrete Fourier transform ', IEEE Trans. Acoust. Speech Signal Process., 1984, 32, (4), p. 803-816 0096-3518
-
(1984)
IEEE Trans. Acoust. Speech Signal Process.
, vol.32
, Issue.4
, pp. 803-816
-
-
Wang, Z.1
-
14
-
-
0024885515
-
Practical fast 1-D DCT algorithms with 11-multiplications
-
Glasgow, UK
-
Loeffler, C., Lightenberg, A., and Moschytz, G.S.: ' Practical fast 1-D DCT algorithms with 11-multiplications ', Proc. ICASSP, Glasgow, UK, 1989, 2, p. 988-991
-
(1989)
Proc. ICASSP
, vol.2
, pp. 988-991
-
-
Loeffler, C.1
Lightenberg, A.2
Moschytz, G.S.3
-
15
-
-
29144453856
-
Quality and power effcient architecture for the discrete cosine transform
-
Sung, C.C., Ruan, S.J., Lin, B.Y., and Shie, M.C.: ' Quality and power effcient architecture for the discrete cosine transform ', IEICE Trans. Fundam., 2005, E88-A, p. 3500-3507
-
(2005)
IEICE Trans. Fundam.
, vol.E88-A
, pp. 3500-3507
-
-
Sung, C.C.1
Ruan, S.J.2
Lin, B.Y.3
Shie, M.C.4
-
16
-
-
0033336164
-
A fast multiplierless block transform for image and video compression
-
Tran, T.D.: ' A fast multiplierless block transform for image and video compression ', Int. Conf. on Image Processing, 1999, p. 822-826
-
(1999)
Int. Conf. on Image Processing
, pp. 822-826
-
-
Tran, T.D.1
-
17
-
-
0033726834
-
The binDCT: Fast multiplierless approximation of the DCT
-
1070-9908
-
Tran, T.D.: ' The binDCT: fast multiplierless approximation of the DCT ', IEEE Signal Process. Lett., 2000, 7, p. 141-144 1070-9908
-
(2000)
IEEE Signal Process. Lett.
, vol.7
, pp. 141-144
-
-
Tran, T.D.1
-
18
-
-
0035673741
-
Fast multiplierless approximations of the DCT with the lifting scheme
-
1053-587X
-
Liang, J., and Tran, T.D.: ' Fast multiplierless approximations of the DCT with the lifting scheme ', IEEE Trans. Signal Process., 2001, 49, (12), p. 3032-3044 1053-587X
-
(2001)
IEEE Trans. Signal Process.
, vol.49
, Issue.12
, pp. 3032-3044
-
-
Liang, J.1
Tran, T.D.2
-
19
-
-
18944390158
-
BinDCT and its efficent VLSI architectures for real-time embedded applications
-
Dang, P.P., Chau, P.M., Nguyen, T.Q., and Tran, T.D.: ' BinDCT and its efficent VLSI architectures for real-time embedded applications ', J. Image Sci. Technol., 2005, 49, (2), p. 124-137
-
(2005)
J. Image Sci. Technol.
, vol.49
, Issue.2
, pp. 124-137
-
-
Dang, P.P.1
Chau, P.M.2
Nguyen, T.Q.3
Tran, T.D.4
-
20
-
-
84919346176
-
The CORDIC trigonometric computing technique
-
Volder, J.E.: ' The CORDIC trigonometric computing technique ', IRE Trans. Electron Comput., 1959, 8, p. 330-334
-
(1959)
IRE Trans. Electron Comput.
, vol.8
, pp. 330-334
-
-
Volder, J.E.1
-
21
-
-
0001500758
-
A unified algorithm for elementary functions
-
Walther, J.S.: ' A unified algorithm for elementary functions ', Proc. Spring Joint Comput. Conf., 1971, 38, p. 379-385
-
(1971)
Proc. Spring Joint Comput. Conf.
, vol.38
, pp. 379-385
-
-
Walther, J.S.1
-
22
-
-
0036173699
-
A scaled DCT architecture with the CORDIC algorithm
-
1053-587X
-
Yu, S., and Swartzlander, E.E.: ' A scaled DCT architecture with the CORDIC algorithm ', IEEE Trans. Signal Process., 2002, 50, (1), p. 160-167 1053-587X
-
(2002)
IEEE Trans. Signal Process.
, vol.50
, Issue.1
, pp. 160-167
-
-
Yu, S.1
Swartzlander, E.E.2
-
23
-
-
0029545884
-
An algorithm and architecture based on orthonormal micro-rotations for computing the symmetric EVD
-
0167-9260
-
Goetze, J., and Hekstra, G.: ' An algorithm and architecture based on orthonormal micro-rotations for computing the symmetric EVD ', Integr. VLSI J., 1995, 20, p. 21-39 0167-9260
-
(1995)
Integr. VLSI J.
, vol.20
, pp. 21-39
-
-
Goetze, J.1
Hekstra, G.2
-
24
-
-
38649138889
-
-
The JPEG-6b website. http://www.ijg.org/, 1998
-
(1998)
-
-
-
25
-
-
26444617595
-
Efficient VLSI implementations of fast multiplierless approximated DCT using parameterized hardware modules for silicon intellectual property design
-
1057-7122
-
Hsiao, S.F., Hu, Y.H., Juang, T.B., and Lee, C.H.: ' Efficient VLSI implementations of fast multiplierless approximated DCT using parameterized hardware modules for silicon intellectual property design ', IEEE Trans. Circuits Syst. I, 2005, 52, (8), p. 1568-1579 1057-7122
-
(2005)
IEEE Trans. Circuits Syst. i
, vol.52
, Issue.8
, pp. 1568-1579
-
-
Hsiao, S.F.1
Hu, Y.H.2
Juang, T.B.3
Lee, C.H.4
-
26
-
-
0028561677
-
A fast DCT processor, based on special purpose CORDIC rotators
-
Mariatos, E.P., Metafas, D.E., Hallas, J.A., and Goutis, C.E.: ' A fast DCT processor, based on special purpose CORDIC rotators ', IEEE Int. Symp. on Circuits and Systems, 1994, 4, p. 271-274
-
(1994)
IEEE Int. Symp. on Circuits and Systems
, vol.4
, pp. 271-274
-
-
Mariatos, E.P.1
Metafas, D.E.2
Hallas, J.A.3
Goutis, C.E.4
-
28
-
-
34250625124
-
Implementation of a Cordic based FFT on a reconfigurable hardware accelerator
-
3rd
-
Heyne, B., Bucker, M., and Gotze, J.: ' Implementation of a Cordic based FFT on a reconfigurable hardware accelerator ', 3rd, Karlsruhe Workshop on Software Radios, 2004
-
(2004)
Karlsruhe Workshop on Software Radios
-
-
Heyne, B.1
Bucker, M.2
Gotze, J.3
-
29
-
-
34250640918
-
A pure cordic based FFT for reconfigurable digital signal processing
-
12th
-
Heyne, B., and Gotze, J.: ' A pure cordic based FFT for reconfigurable digital signal processing ', 12th, European Signal Processing Conf., 2004
-
(2004)
European Signal Processing Conf.
-
-
Heyne, B.1
Gotze, J.2
-
30
-
-
0031997061
-
Parametrization of orthonormal wavelet transforms and their implementation
-
1057-7130
-
Rieder, P., Gotze, J., Nossek, J.A., and Burrus, C.S.: ' Parametrization of orthonormal wavelet transforms and their implementation ', IEEE Trans. Circuits Syst II., 1998, 45, (2), p. 217-226 1057-7130
-
(1998)
IEEE Trans. Circuits Syst II.
, vol.45
, Issue.2
, pp. 217-226
-
-
Rieder, P.1
Gotze, J.2
Nossek, J.A.3
Burrus, C.S.4
-
31
-
-
0023244560
-
New 2n DCT algorithms suitable for VLSI implementation
-
Duhamel, P., and H'Mida, H.: ' New 2n DCT algorithms suitable for VLSI implementation ', IEEE Int. Conf. on ICASSP, 1987, 12, p. 1805-1808
-
(1987)
IEEE Int. Conf. on ICASSP
, vol.12
, pp. 1805-1808
-
-
Duhamel, P.1
H'Mida, H.2
-
32
-
-
38649127366
-
-
The XVID Website. http://www.xvid.org/, 2005
-
(2005)
-
-
|