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Volumn , Issue , 1999, Pages 135-138

A high-performance low-power asynchronous matrix-vector multiplier for discrete cosine transform

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[No Author keywords available]

Indexed keywords


EID: 85013917280     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/APASIC.1999.824046     Document Type: Conference Paper
Times cited : (5)

References (11)
  • 1
    • 0029293575 scopus 로고
    • Minimizing power consumption in digital CMOS circuits
    • April
    • A. P. Chandrakasan, R. W. Brodersen, "Minimizing power consumption in digital CMOS circuits, " Proceedings of the IEEE, vol. 83, no. 4, pp. 498-523, April 1995.
    • (1995) Proceedings of the IEEE , vol.83 , Issue.4 , pp. 498-523
    • Chandrakasan, A.P.1    Brodersen, R.W.2
  • 2
    • 0032303815 scopus 로고    scopus 로고
    • Algorithm-based low-power transform coding architecture: The multirate approach
    • Dec
    • A. Y. Wu, K. J. R. Liu, "Algorithm-Based Low-Power Transform Coding Architecture: The Multirate Approach, " IEEE Transactions on VLSI Systems, vol. 6, No. 4, pp. 707-718, Dec. 1998.
    • (1998) IEEE Transactions on VLSI Systems , vol.6 , Issue.4 , pp. 707-718
    • Wu, A.Y.1    Liu, K.J.R.2
  • 4
    • 0032614261 scopus 로고    scopus 로고
    • A Low-Power IDCT Macrocell for MPEG-2 MP@ML exploiting data distribution properties for minimal activity
    • May
    • T. Xanthopoulos and A. P. Chandrakasan, "A Low-Power IDCT Macrocell for MPEG-2 MP@ML Exploiting Data Distribution Properties for Minimal Activity, " IEEE Journal of Solid-State Circuits, vol. 34, pp. 693-703, May 1999.
    • (1999) IEEE Journal of Solid-State Circuits , vol.34 , pp. 693-703
    • Xanthopoulos, T.1    Chandrakasan, A.P.2
  • 5
    • 0032288788 scopus 로고    scopus 로고
    • Micropipelined asynchronous discrete cosine transform (DCT/IDCT) Processor
    • D. Johnson, V. Akella, B. Stott, "Micropipelined Asynchronous Discrete Cosine Transform (DCT/IDCT) Processor, " IEEE Transactions on VLSI Systems, vol. 6, No. 4, pp. 731-740, 1998.
    • (1998) IEEE Transactions on VLSI Systems , vol.6 , Issue.4 , pp. 731-740
    • Johnson, D.1    Akella, V.2    Stott, B.3
  • 6
    • 0030235195 scopus 로고    scopus 로고
    • Design of a low-latency asynchronous adder using speculative completion
    • S. M. Nowick, "Design of a Low-Latency Asynchronous Adder Using Speculative Completion, " IEE Proceedings-Computers and Digital Techniques, vol. 143, no. 5, pp. 301-307, 1996.
    • (1996) IEE Proceedings-Computers and Digital Techniques , vol.143 , Issue.5 , pp. 301-307
    • Nowick, S.M.1
  • 8
    • 0017538003 scopus 로고
    • A fast computational algorithm for the discrete cosine transform
    • Sept
    • W. H. Chen, C. H. Smith, S. Fralick, "A Fast Computational Algorithm for the Discrete Cosine Transform, " IEEE Transactions on Communications, vol. COM-25, pp. 1004-1009, Sept. 1977.
    • (1977) IEEE Transactions on Communications , vol.COM-25 , pp. 1004-1009
    • Chen, W.H.1    Smith, C.H.2    Fralick, S.3
  • 11
    • 0024700020 scopus 로고
    • Applications of distributed arithmetic to digital signal processing: A tutorial review
    • July
    • S. A. White, "Applications of Distributed Arithmetic to Digital Signal Processing: A Tutorial Review, " IEEE ASSP Magazine, pp. 4-19, July 1989.
    • (1989) IEEE ASSP Magazine , pp. 4-19
    • White, S.A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.