SCOPUS 정보 검색 플랫폼

Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Volumn 2, Issue , 2002, Pages 541-544

Data driven VLSI computation for low power DCT-based video coding

(2) Fanucci, L a Saponara, S b

a CNR (Italy)

b UNIVERSITY OF PISA (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

2D DISCRETE COSINE TRANSFORM; CLOCK GATING; DATA DRIVEN; DCT/IDCT; DISTRIBUTED ARITHMETIC; INPUT DATAS; LOW POWER; LOW-COMPLEXITY; MOST SIGNIFICANT BIT; MPEG VIDEO; POWER REDUCTIONS; SIGN EXTENSION; VIDEO CODING; VLSI ARCHITECTURES;

COSINE TRANSFORMS; IMAGE CODING; MOTION PICTURE EXPERTS GROUP STANDARDS; VLSI CIRCUITS;

DISCRETE COSINE TRANSFORMS;

EID: 27944480551 PISSN: None EISSN: None Source Type: Conference Proceeding
DOI: 10.1109/ICECS.2002.1046221 Document Type: Conference Paper

Times cited : (27)

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2
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4
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8
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.