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Volumn 2003-January, Issue , 2003, Pages 57-64

Combining software and hardware monitoring for improved power and performance tuning

Author keywords

Application software; Cognitive science; Educational institutions; Energy consumption; Hardware; Iris; Monitoring; Power engineering and energy; Sampling methods; Software performance

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER SOFTWARE; ELECTRIC POWER UTILIZATION; ENERGY UTILIZATION; HARDWARE; MONITORING; PROGRAM COMPILERS;

EID: 38349104261     PISSN: 15506207     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/INTERA.2003.1192356     Document Type: Conference Paper
Times cited : (10)

References (23)
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  • 9
    • 0013035133 scopus 로고    scopus 로고
    • Using IPC variation in workloads with externally specified rates to reduce power consumption
    • June Held in conjunction with the International Symposium on Computer Architecture
    • S. Ghiasi, J. Casmira, and D. Grunwald. Using IPC variation in workloads with externally specified rates to reduce power consumption. InWorkshop on Complexity-Effective Design, June 2000. Held in conjunction with the International Symposium on Computer Architecture.
    • (2000) Workshop on Complexity-Effective Design
    • Ghiasi, S.1    Casmira, J.2    Grunwald, D.3
  • 10
    • 0029492342 scopus 로고
    • Sh3: High code density, low power
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    • Hasegawa, A.1
  • 15
    • 3543104761 scopus 로고    scopus 로고
    • Dynamically reconfiguring processor resources to reduce power consumption in high-performance processors
    • November Held in conjunction with the International Conference on Architectural Support for Programming Languages and Operating Systems (ASP-LOS
    • R. Maro, Y. Bai, and R. I. Bahar. Dynamically reconfiguring processor resources to reduce power consumption in high-performance processors. InWorkshop on Power-Aware Computer Systems, November 2000. Held in conjunction with the International Conference on Architectural Support for Programming Languages and Operating Systems (ASP-LOS).
    • (2000) Workshop on Power-Aware Computer Systems
    • Maro, R.1    Bai, Y.2    Bahar, R.3
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    • 0035691607 scopus 로고    scopus 로고
    • Reducing power requirements of instruction scheduling through dynamic allocation of multiple datapath resources
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    • D. Ponomarev, G. Kucuk, and K. Ghose. Reducing power requirements of instruction scheduling through dynamic allocation of multiple datapath resources. InInternational Symposium on Microarchitecture, December 2001.
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    • Cool-fetch: Compiler-enabled power-aware fetch throttling
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.