Slack: Maximizing performance under technological constraints

Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA

Volumn , Issue , 2002, Pages 47-58

  Fields, Brian ^a   Bodík, Rastislav ^a   Hill, Mark D ^a  

^a University of Wisconsin Madison   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER CONTROL; COMPUTER HARDWARE; CONSTRAINT THEORY; DELAY CIRCUITS; OPTIMIZATION; PIPELINE PROCESSING SYSTEMS; PROBLEM SOLVING;

TECHNOLOGICAL CONSTRAINTS;

MICROPROCESSOR CHIPS;

EID: 0036296821     PISSN: 08847495     EISSN: None     Source Type: Journal    
DOI: 10.1109/ISCA.2002.1003561     Document Type: Article

References (16)

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7. Evaluating design tradeoffs in dual speed pipelines
8. A design space evaluation of grid processor architectures
9. Energy-efficient processor design using multiple clock domains with dynamic voltage and frequency scaling
10. Reducing power with dynamic critical path information
11. Locality vs. criticality
12. Load latency tolerance in dynamically scheduled processors
13. Dynamic prediction of critical path instructions