Instruction set extension generation with considering physical constraints

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 4367 LNCS, Issue , 2007, Pages 291-305

  Wu, I Wei ^a   Huang, Shih Chia ^a   Chung, Ping ^a   Shann, Jyh Jiun ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

ASIP; Extensible processors; Instruction set extension; Pipestage timing constraint

Indexed keywords

ALGORITHMS; CONSTRAINT THEORY; PROBLEM SOLVING; SILICON;

EXTENSIBLE PROCESSORS; INSTRUCTION SET EXTENSION; KNAPSACK PROBLEM; PIPESTAGE TIMING CONSTRAINT;

VERY LONG INSTRUCTION WORD ARCHITECTURE;

EID: 38149018417     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-69338-3_20     Document Type: Conference Paper

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