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Volumn , Issue , 2007, Pages 288-293

Cache coherency communication cost in a NoC-based MPSoC platform

Author keywords

Cache coherence; Directory; MPSoC; NoC

Indexed keywords

COMMUNICATION; COMPUTER SIMULATION; NETWORK PROTOCOLS; PROBLEM SOLVING;

EID: 37849019005     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1284480.1284558     Document Type: Conference Paper
Times cited : (19)

References (16)
  • 1
    • 34250827032 scopus 로고    scopus 로고
    • Petrot, F.; Greiner, A.; Gomez, P.; On Cache Coherency and Memory Consistency Issues in NoC Based Shared Memory Multiprocessor SoC Architectures. In: Digital System Design: Architectures, Methods and Tools, 2006. DSD 2006. 9th EUROMICRO Conference on 30-01 Aug. 2006 Page(s):53 - 60.
    • Petrot, F.; Greiner, A.; Gomez, P.; "On Cache Coherency and Memory Consistency Issues in NoC Based Shared Memory Multiprocessor SoC Architectures". In: Digital System Design: Architectures, Methods and Tools, 2006. DSD 2006. 9th EUROMICRO Conference on 30-01 Aug. 2006 Page(s):53 - 60.
  • 2
    • 37849029050 scopus 로고    scopus 로고
    • ITRS, International technology roadmap for semiconductors update
    • ITRS, International technology roadmap for semiconductors update 2003, http://public.itrs.net
    • (2003)
  • 5
    • 0018152817 scopus 로고
    • A new solution to coherence problems in multicache systems
    • Nov
    • Censier, L. M.; Feautrier, P. "A new solution to coherence problems in multicache systems." IEEE Trans. Computers, 20(12):1112-1118, Nov. 1978.
    • (1978) IEEE Trans. Computers , vol.20 , Issue.12 , pp. 1112-1118
    • Censier, L.M.1    Feautrier, P.2
  • 7
    • 22344451866 scopus 로고    scopus 로고
    • MPARM: Exploring the Multi-Processor SoC Design Space with SystemC. The
    • September
    • Benini, L. et al; "MPARM: Exploring the Multi-Processor SoC Design Space with SystemC". The Journal of VLSI Signal Processing, 41(2): 169 - 182, September 2005
    • (2005) Journal of VLSI Signal Processing , vol.41 , Issue.2 , pp. 169-182
    • Benini, L.1
  • 10
    • 0036760609 scopus 로고    scopus 로고
    • A scalable high-performance computing solution for network on chip
    • Sep.-Oct
    • Forsell, M. "A scalable high-performance computing solution for network on chip". IEEE Micro, vol. 22, no. 5, pp. 46-55, Sep.-Oct. 2002.
    • (2002) IEEE Micro , vol.22 , Issue.5 , pp. 46-55
    • Forsell, M.1
  • 11
    • 0036857007 scopus 로고    scopus 로고
    • A system-level exploration platform for network processors
    • Nov
    • Paulin, P.; Pilkington, C.; Bensoudane, E. Stepnp: "A system-level exploration platform for network processors". IEEE Design & Test of Computers, pages 17-26, Nov. 2002.
    • (2002) IEEE Design & Test of Computers , pp. 17-26
    • Paulin, P.1    Pilkington, C.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.