Native ISS-SystemC integration for the co-simulation of multi-processor SoC

Proceedings - Design, Automation and Test in Europe Conference and Exhibition

Volumn 1, Issue , 2004, Pages 564-569

  Fummi, Franco ^a   Martini, Stefano ^b   Perbellini, Giovanni ^b   Poncino, Massimo ^a  

^a UNIVERSITY OF VERONA   (Italy)

^b Embedded Systems Design Center   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

DRIVER-KERNEL SCHEME; INSTRUCTION SET SIMULATOR (ISS); INTER-PACKET DELAY; EFFICIENT CO-SIMULATION; HARDWARE COMPONENTS; HARDWARE MODELING LANGUAGE; HIGH LEVEL DESCRIPTION; INSTRUCTION SET SIMULATORS; MULTI-PROCESSOR SOC; PROGRAMMABLE DEVICES; SYSTEM LEVEL DESIGN;

COMPUTER HARDWARE; COMPUTER SIMULATION; EMBEDDED SYSTEMS; MATHEMATICAL MODELS; MULTIPROCESSING SYSTEMS; PACKET NETWORKS; PROGRAM DEBUGGING; COMPUTER ARCHITECTURE; DESIGN; EXHIBITIONS; HARDWARE;

MICROPROCESSOR CHIPS; COMPUTER SIMULATION;

EID: 3042569041     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2004.1268905     Document Type: Conference Paper

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