Memory-efficient multithreaded code generation from Simulink for heterogeneous MPSoC

Design Automation for Embedded Systems

Volumn 11, Issue 4, 2007, Pages 249-283

  Han, Sang Il ^a   Chae, Soo Ik ^a   Brisolara, Lisane ^b   Carro, Luigi ^b   Reis, Ricardo ^b   Guérin, Xavier ^c   Jerraya, Ahmed Amine ^d  

^a Seoul National University   (South Korea)

^b FEDERAL UNIVERSITY OF RIO GRANDE DO SUL   (Brazil)

^c TIMA LABORATORY   (France)

^d CEA LETI   (France)

Author keywords

Memory size reduction; Multiprocessor SoC; Multithreaded code generation; Simulink

Indexed keywords

CHIP SCALE PACKAGES; COMPUTER SIMULATION; EMBEDDED SYSTEMS; MULTIPROCESSING SYSTEMS; STORAGE ALLOCATION (COMPUTER);

MEMORY OPTIMIZATION; MEMORY SIZE REDUCTION; MULTITHREADED CODE GENERATION; SIMULINK;

COMPUTER PROGRAMMING;

EID: 37349026243     PISSN: 09295585     EISSN: 15728080     Source Type: Journal    
DOI: 10.1007/s10617-007-9009-4     Document Type: Article

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