DRAM-level prefetching for fully-buffered DIMM: Design, performance and power saving

ISPASS 2007: IEEE International Symposium on Performance Analysis of Systems and Software

Volumn , Issue , 2007, Pages 94-104

  Lin, Jiang ^a   Zheng, Hongzhong ^b   Zhu, Zhichun ^b   Zhang, Zhao ^a   David, Howard ^c  

^a Iowa State University of Science and Technology   (United States)

^b 1120 Science and Engineering Offices   (United States)

^c INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADVANCED MEMORY BUFFERS (AMBS); FULLY BUFFERED DIMM (FB-DIMM); MEMORY BLOCKS; MEMORY CONTROLLER;

BANDWIDTH; BLOCK CODES; BUFFER STORAGE; ELECTRIC POWER UTILIZATION; SOFTWARE DESIGN; STORAGE ALLOCATION (COMPUTER);

DYNAMIC RANDOM ACCESS STORAGE;

EID: 36949005837     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISPASS.2007.363740     Document Type: Conference Paper

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