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Volumn 6521, Issue , 2007, Pages

Lithography simulation in DfM - Achievable accuracy versus requirements

Author keywords

Closed loop DfM; Compact models; Dense simulation; Design for manufacturability (DfM); Optical proximity correction (OPC); Process window; Resolution enhancement techniques (RET); Through process models

Indexed keywords

COMPACT MODELS; DENSE SIMULATION; DESIGN FOR MANUFACTURABILITY (DFM); OPTICAL PROXIMITY CORRECTION (OPC); PROCESS WINDOW; RESOLUTION ENHANCEMENT TECHNIQUES (RET);

EID: 35148848213     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.712437     Document Type: Conference Paper
Times cited : (5)

References (12)
  • 1
    • 35148828428 scopus 로고    scopus 로고
    • Jason E. Meiring, Henning Haffner, Scott D. Halle, Scott M. Mansfield, ACLV Driven Double-Patterning Decomposition With Extensively Added Printing Assist Features (PrAFs) to be published SPIE 6520 Optical Microlithography XX, Donis G. Flagello, Ed., 2007
    • Jason E. Meiring, Henning Haffner, Scott D. Halle, Scott M. Mansfield, "ACLV Driven Double-Patterning Decomposition With Extensively Added Printing Assist Features (PrAFs)" to be published SPIE Vol 6520 Optical Microlithography XX, Donis G. Flagello, Ed., 2007
  • 2
    • 18644379512 scopus 로고    scopus 로고
    • Stephen Hsu, Noel P. Corcoran, Mark Eurlings, William T. Knose, Thomas L. Laidig, Kurt E. Wampler, Sabita Roy, Xuelong Shi, Chungwei Michael Hsu, J. Fung Chen, Jo Finders, Robert J. Socha, and Mircea V. Dusa, Dipole decomposition mask design for full-chip implementation at 100-nm technology node and beyond, Proc. SPIE 4691 Optical Microlithography XV, Anthony Yen, Editor, July 2002
    • Stephen Hsu, Noel P. Corcoran, Mark Eurlings, William T. Knose, Thomas L. Laidig, Kurt E. Wampler, Sabita Roy, Xuelong Shi, Chungwei Michael Hsu, J. Fung Chen, Jo Finders, Robert J. Socha, and Mircea V. Dusa, "Dipole decomposition mask design for full-chip implementation at 100-nm technology node and beyond," Proc. SPIE 4691 Optical Microlithography XV, Anthony Yen, Editor, July 2002
  • 4
    • 33745787475 scopus 로고    scopus 로고
    • Azalia Krasnoperova, James A. CuIp, Ioana Graur, Scott Mansfield, Process Window OPC for Reduced Process Variability and Enhanced Yield, Proc. SPIE 6154, Optical Microlithography XIX; Donis G. Flagello; Ed., May 2006
    • Azalia Krasnoperova, James A. CuIp, Ioana Graur, Scott Mansfield, "Process Window OPC for Reduced Process Variability and Enhanced Yield," Proc. SPIE Vol 6154, Optical Microlithography XIX; Donis G. Flagello; Ed., May 2006
  • 6
  • 7
    • 25144470584 scopus 로고    scopus 로고
    • Optimized hardware and software for fast full-chip simulation
    • Bruce W. Smith, Ed, May
    • Yu Cao, Yen-Wen Lu, Luoqi Chen, and Jun Ye, "Optimized hardware and software for fast full-chip simulation," Proc. SPIE 5754 Optical Microlithography XVIII, Bruce W. Smith, Ed., May 2004
    • (2004) Proc. SPIE 5754 Optical Microlithography , vol.18
    • Cao, Y.1    Lu, Y.2    Chen, L.3    Ye, J.4
  • 9
    • 33745790059 scopus 로고    scopus 로고
    • Geng Han, Scott Mansfield, and Azalia Krasnoperova, Integration of the Reticle Systematic CD Errors into an OPC Modeling and Correction, Proc. SPIE 6154, Optical Microlithography XIX; Donis G. Flagello; Ed., May 2006
    • Geng Han, Scott Mansfield, and Azalia Krasnoperova, "Integration of the Reticle Systematic CD Errors into an OPC Modeling and Correction," Proc. SPIE Vol 6154, Optical Microlithography XIX; Donis G. Flagello; Ed., May 2006
  • 10
    • 33745804939 scopus 로고    scopus 로고
    • Scott Mansfield, Geng Han, Mohamed Al-Imam, and Rami Fathy, Through-process modeling in a DfM environment SPIE 6156, Design and Process Integration for Microelectronic Manufacturing IV; Alfred K. Wong; Ed., May 2006
    • Scott Mansfield, Geng Han, Mohamed Al-Imam, and Rami Fathy, "Through-process modeling in a DfM environment" SPIE Vol. 6156, Design and Process Integration for Microelectronic Manufacturing IV; Alfred K. Wong; Ed., May 2006
  • 11
    • 35148881485 scopus 로고    scopus 로고
    • Closed Loop Design for Manufacturability,
    • U.S. Patent application FIS920060244US1
    • Ioana Graur, Geng Han, Lars Liebmann and Scott Mansfield, "Closed Loop Design for Manufacturability," U.S. Patent application FIS920060244US1
    • Graur, I.1    Han, G.2    Liebmann, L.3    Mansfield, S.4
  • 12
    • 35148818608 scopus 로고    scopus 로고
    • Co-optimization of Product Design and Semiconductor Process Technology: The Core of a Winning DFM Strategy
    • Jan
    • Ali R. Farhang, Tim Deeter, and Sunit Rikhi, "Co-optimization of Product Design and Semiconductor Process Technology: The Core of a Winning DFM Strategy," Future Fab Intl. 22, Jan 2007
    • (2007) Future Fab Intl , vol.22
    • Farhang, A.R.1    Deeter, T.2    Rikhi, S.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.