Improved SAT-based Boolean matching using implicants for LUT-based FPGAs

ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA

Volumn , Issue , 2007, Pages 139-147

  Cong, Jason ^a   Minkovich, Kirill ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Boolean matching; FPGA lookup table; Implicant; Logic synthesis; SAT

Indexed keywords

COMPUTER ARCHITECTURE; FUNCTION EVALUATION; PROBLEM SOLVING; THEOREM PROVING;

BOOLEAN MATCHING; FPGA LOOKUP TABLE; LOGIC SYNTHESIS;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 34748910665     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1216919.1216944     Document Type: Conference Paper

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