RASP: a general logic synthesis system for SRAM-based FPGAs

ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA

Volumn , Issue , 1996, Pages 137-143

  Cong, Jason ^a   Peck, John ^a   Ding, Yuzheng ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; LOGIC DESIGN; MATHEMATICAL TECHNIQUES; OPTIMIZATION; RANDOM ACCESS STORAGE; RAPID PROTOTYPING; TABLE LOOKUP;

CRITICAL PATH DELAY; FIELD PROGRAMMABLE GATE ARRAYS; LOGIC SYNTHESIS; PROGRAMMABLE LOGIC BLOCKS; RAPID SYSTEM PROTOTYPING; VIDEO COMPRESSOR;

LOGIC GATES;

EID: 0029712690     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (21)