Improvements to technology mapping for LUT-based FPGAs

ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA

Volumn , Issue , 2006, Pages 41-49

  Mishchenko, Alan ^a   Chatterjee, Satrajit ^a   Brayton, Robert ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Area Recovery; Cut Enumeration; FPGA; Lossless Synthesis; Technology Mapping

Indexed keywords

BENCHMARKING; MAPPING; OPTIMIZATION; PRODUCT DESIGN; STATISTICAL METHODS;

AREA RECOVERY; CUT ENUMERATION; LOSSLESS SYNTHESIS; TECHNOLOGY MAPPING;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 33745805562     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1117201.1117208     Document Type: Conference Paper

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