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Volumn , Issue , 2007, Pages 33-41

A synthesizable datapath-oriented embedded FPGA fabric

Author keywords

Datapath; Embedded block; Field programmable gate array; Integrated circuit; Synthesis; System on chip

Indexed keywords

COMPUTATION THEORY; COMPUTER ARCHITECTURE; EMBEDDED SYSTEMS; INTEGRATED CIRCUITS; OPTIMIZATION;

EID: 34748872044     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1216919.1216924     Document Type: Conference Paper
Times cited : (18)

References (17)
  • 2
    • 0029701117 scopus 로고    scopus 로고
    • DP-FPGA: An FPGA architecture optimized for datapaths
    • D. Cherepacha and D. Lewis. DP-FPGA: An FPGA architecture optimized for datapaths. In Int. Conf. on VLSI Design, pages 329-343, 1996.
    • (1996) Int. Conf. on VLSI Design , pp. 329-343
    • Cherepacha, D.1    Lewis, D.2
  • 5
    • 1642364107 scopus 로고    scopus 로고
    • The Chimera Reconfigurable functional unit
    • Feb
    • S. Hauck, T. Fry, M. Hosier, and J. Kao. The Chimera Reconfigurable functional unit. IEEE Trans. on VLSI, 12(2):206-217, Feb. 2004.
    • (2004) IEEE Trans. on VLSI , vol.12 , Issue.2 , pp. 206-217
    • Hauck, S.1    Fry, T.2    Hosier, M.3    Kao, J.4
  • 13
    • 0034187952 scopus 로고    scopus 로고
    • Morphosys: An integrated reconfigurable system for data-parallel and compute intensive applications
    • April
    • H. Singh, M. Lee, G. Lu, F. Kurdahi, N. Bagherzadeh, and E. Chaves. Morphosys: An integrated reconfigurable system for data-parallel and compute intensive applications. IEEE Trans. on Computers, 49(5):465-481, April 2000.
    • (2000) IEEE Trans. on Computers , vol.49 , Issue.5 , pp. 465-481
    • Singh, H.1    Lee, M.2    Lu, G.3    Kurdahi, F.4    Bagherzadeh, N.5    Chaves, E.6
  • 15
    • 33746441579 scopus 로고    scopus 로고
    • Product-term based synthesizable embedded programmable logic cores
    • May
    • A. Yan and S. Wilton. Product-term based synthesizable embedded programmable logic cores. IEEE Trans. on VLSI, 14(5):474-488, May 2006.
    • (2006) IEEE Trans. on VLSI , vol.14 , Issue.5 , pp. 474-488
    • Yan, A.1    Wilton, S.2
  • 16
    • 20344380963 scopus 로고    scopus 로고
    • Using bus-based connections to improve field-programmable gate array density for implementing datapath circuits
    • Feb
    • A. Ye and J. Rose. Using bus-based connections to improve field-programmable gate array density for implementing datapath circuits. In Int. Symp. on Field-Programmable Gate Arrays, pages 3-13, Feb. 2005.
    • (2005) Int. Symp. on Field-Programmable Gate Arrays , pp. 3-13
    • Ye, A.1    Rose, J.2
  • 17
    • 0242443754 scopus 로고    scopus 로고
    • Architecture of datapath-oriented coarse-grain logic and routing for FPGAs
    • Sept
    • A. Ye, J. Rose, and D. Lewis. Architecture of datapath-oriented coarse-grain logic and routing for FPGAs. In IEEE Custom Integrated Circuits Conf., pages 61-64, Sept. 2003.
    • (2003) IEEE Custom Integrated Circuits Conf , pp. 61-64
    • Ye, A.1    Rose, J.2    Lewis, D.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.