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Volumn , Issue , 2007, Pages 119-126

A stable fixed-outline floorplanning method

Author keywords

Fixed outline; Floorplanning; Sequence pair

Indexed keywords

ASPECT RATIO; CHIP SCALE PACKAGES; INTERCONNECTION NETWORKS; OPTIMIZATION;

EID: 34748870245     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1231996.1232021     Document Type: Conference Paper
Times cited : (6)

References (13)
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    • Fixed-outline floorplanning through better local search
    • S. Adya and I. Markov. Fixed-outline floorplanning through better local search. In Proc. ICCD, pages 328-334, 2001.
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    • Adya, S.1    Markov, I.2
  • 4
    • 29144505066 scopus 로고    scopus 로고
    • Are floorplan representations important in digital design
    • H. Chan, S. N. Adya, and I. L. markov. Are floorplan representations important in digital design. In Proc. of ACM ISPD, pages 129-136, 2005.
    • (2005) Proc. of ACM ISPD , pp. 129-136
    • Chan, H.1    Adya, S.N.2    markov, I.L.3
  • 5
    • 29144499085 scopus 로고    scopus 로고
    • Modern floorplanning based on fast simulated annealing
    • T. Chen and Y. W. Chang. Modern floorplanning based on fast simulated annealing. In Proc. ACM ISPD, pages 104-112, 2005.
    • (2005) Proc. ACM ISPD , pp. 104-112
    • Chen, T.1    Chang, Y.W.2
  • 6
    • 33645694781 scopus 로고    scopus 로고
    • Modern floorplanning based on b*-tree and fast simulated annealing
    • April
    • T. Chen and Y. W. Chang. Modern floorplanning based on b*-tree and fast simulated annealing. CAD of integrated circuits and systems IEEE Trans. on, 25(4):637-650, April 2006.
    • (2006) CAD of integrated circuits and systems IEEE Trans. on , vol.25 , Issue.4 , pp. 637-650
    • Chen, T.1    Chang, Y.W.2
  • 7
    • 34748918206 scopus 로고    scopus 로고
    • based floorplanner. Online
    • T. C. Chen and Y. W. Chang. B*-tree based floorplanner. Online:http://eda.ee.ntu.edu.tw/research.htm.
    • B*-tree
    • Chen, T.C.1    Chang, Y.W.2
  • 8
    • 0032690067 scopus 로고    scopus 로고
    • An o-tree representation of nonslicing floorplan and its applications
    • P. Guo, C. Cheng, and T. Yoshimura. An o-tree representation of nonslicing floorplan and its applications. In Proc. ACM/IEEE DAC, pages 268-273, 1999.
    • (1999) Proc. ACM/IEEE DAC , pp. 268-273
    • Guo, P.1    Cheng, C.2    Yoshimura, T.3
  • 10
    • 0033705078 scopus 로고    scopus 로고
    • Classical floorplanning harmful
    • A. Kahng. Classical floorplanning harmful. In Proc. ACM ISPD, pages 207-213, 2000.
    • (2000) Proc. ACM ISPD , pp. 207-213
    • Kahng, A.1
  • 11
    • 2442427516 scopus 로고    scopus 로고
    • Robust fixed-outline floorplanning through evolutionary search
    • C. Lin, D. Chen, and Y. Wang. Robust fixed-outline floorplanning through evolutionary search. In Proc. IEEE/ACM ASP-DAC, pages 42-44, 2004.
    • (2004) Proc. IEEE/ACM ASP-DAC , pp. 42-44
    • Lin, C.1    Chen, D.2    Wang, Y.3
  • 12
    • 67649112539 scopus 로고    scopus 로고
    • Fixed-outline floorplanning with constraints through instance augmentation
    • R. Liu, S. Dong, X. Hong, and Y. Kajitani. Fixed-outline floorplanning with constraints through instance augmentation. In Proc. IEEE ISCAS, pages 1883-1886, 2005.
    • (2005) Proc. IEEE ISCAS , pp. 1883-1886
    • Liu, R.1    Dong, S.2    Hong, X.3    Kajitani, Y.4
  • 13
    • 0035670932 scopus 로고    scopus 로고
    • Fast evaluation of sequence pair in block placement by longest common subsequence computation
    • X. Tang, R. Tian, and D. F. Wong. Fast evaluation of sequence pair in block placement by longest common subsequence computation. CAD of integrated circuits and systems, IEEE Trans. on, 20(12):1406-1413, 2001.
    • (2001) CAD of integrated circuits and systems, IEEE Trans. on , vol.20 , Issue.12 , pp. 1406-1413
    • Tang, X.1    Tian, R.2    Wong, D.F.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.