Analyzing and modeling process balance for sub-threshold circuit design

Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Volumn , Issue , 2007, Pages 275-280

  Ryan, Joseph F ^a   Wang, Jiajing ^a   Calhoun, Benton H ^a  

^a University of Virginia

Author keywords

Minimum energy operation; Process balance; Process imbalance; Sub threshold digital circuits; Sub threshold modeling

Indexed keywords

CIRCUIT SIMULATION; MOS DEVICES; PARAMETER ESTIMATION; PROBLEM SOLVING; THRESHOLD VOLTAGE;

MINIMUM ENERGY OPERATION; PROCESS BALANCE; SUB-THRESHOLD DIGITAL CIRCUITS; SUB-THRESHOLD MODELING;

DIGITAL CIRCUITS;

EID: 34748817701     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1228784.1228853     Document Type: Conference Paper

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