Seed layer enhancement by electrochemical deposition: The copper seed solution for beyond 45 nm

Microelectronic Engineering

Volumn 84, Issue 11, 2007, Pages 2610-2614

  Roule, A ^a   Amuntencei, M ^b   Deronzier, E ^a   Haumesser, P H ^a   Da Silva, S ^c   Avale, X ^c   Pollet, O ^c   Baskaran, R ^c   Passemard, G ^b  

^a CEA LETI   (France)

^b STMICROELECTRONICS   (France)

^c Semitool Incorporated   (United States)

Author keywords

Copper; Interconnects; Seed repair

Indexed keywords

CONSTRAINT THEORY; COPPER; DEGRADATION; METALLIZING; MORPHOLOGY;

GEOMETRICAL CONSTRAINTS; SEED LAYER ENHANCEMENT; SEED REPAIR;

ELECTRODEPOSITION;

EID: 34548863632     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mee.2007.06.014     Document Type: Article

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