메뉴 건너뛰기




Volumn , Issue , 2007, Pages 3030-3033

A self-biased charge-transfer sense amplifier

Author keywords

[No Author keywords available]

Indexed keywords

BIAS CURRENTS; CAPACITANCE; CHARGE TRANSFER; DATA STRUCTURES; DIGITAL STORAGE; STATIC ANALYSIS;

EID: 34548812873     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/iscas.2007.377985     Document Type: Conference Paper
Times cited : (11)

References (7)
  • 1
    • 0017012361 scopus 로고    scopus 로고
    • L. G. Heller, D. P. Spampinato, and Y. L. Yao, High sensitivity charge-transfer sense amplifier, Solid-State Circuits, IEEE Journal of, 11, pp. 596-601, 1976.
    • L. G. Heller, D. P. Spampinato, and Y. L. Yao, "High sensitivity charge-transfer sense amplifier," Solid-State Circuits, IEEE Journal of, vol. 11, pp. 596-601, 1976.
  • 2
    • 0032075447 scopus 로고    scopus 로고
    • S. Kawasbima, T. Mori, R. Sasagawa, et al., A charge-transfer amplifier and an encoded-bus architecture for low-power SRAM's, Solid-State Circuits, IEEE Journal of, 33, pp. 793-799, 1998.
    • S. Kawasbima, T. Mori, R. Sasagawa, et al., "A charge-transfer amplifier and an encoded-bus architecture for low-power SRAM's," Solid-State Circuits, IEEE Journal of, vol. 33, pp. 793-799, 1998.
  • 3
    • 0031621632 scopus 로고    scopus 로고
    • A low-power SRAM using improved charge transfer sense amplifiers and a dual-Vth CMOS circuit scheme
    • presented at, Digest of Technical Papers. 1998 Symposium on
    • I. Fukushi, R. Sasagawa, M. Hamaminato, et al., "A low-power SRAM using improved charge transfer sense amplifiers and a dual-Vth CMOS circuit scheme," presented at VLSI Circuits, 1998. Digest of Technical Papers. 1998 Symposium on, 1998, 142-145.
    • (1998) VLSI Circuits, 1998 , pp. 142-145
    • Fukushi, I.1    Sasagawa, R.2    Hamaminato, M.3
  • 5
    • 0026141225 scopus 로고    scopus 로고
    • E. Seevinck, P. J. van Beers, and H. Ontrop, Current-mode techniques for high-speed VLSI circuits with application to current sense amplifier for CMOS SRAM's, Solid-State Circuits, IEEE Journal of, 26, pp. 525-536, 1991.
    • E. Seevinck, P. J. van Beers, and H. Ontrop, "Current-mode techniques for high-speed VLSI circuits with application to current sense amplifier for CMOS SRAM's," Solid-State Circuits, IEEE Journal of, vol. 26, pp. 525-536, 1991.
  • 6
    • 77954087785 scopus 로고    scopus 로고
    • High-performance and low-voltage sense-amplifier techniques for sub-90nm SRAM
    • presented at, IEEE International [Systems-on-Chip
    • M. Sinha, S. Hsu, A. Alvandpour, et al., "High-performance and low-voltage sense-amplifier techniques for sub-90nm SRAM," presented at SOC Conference, 2003. Proceedings. IEEE International [Systems-on-Chip], 2003, 113-116.
    • (2003) SOC Conference, 2003. Proceedings , pp. 113-116
    • Sinha, M.1    Hsu, S.2    Alvandpour, A.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.