메뉴 건너뛰기




Volumn 26, Issue 4, 1991, Pages 525-536

Current-Mode Techniques for High-Speed VLSI Circuits with Application to Current Sense Amplifier for CMOS SRAM's

Author keywords

[No Author keywords available]

Indexed keywords

DATA STORAGE, DIGITAL--RANDOM ACCESS; ELECTRIC NETWORKS, ACTIVE--TRANSMISSION LINE THEORY; INTEGRATED CIRCUITS, CMOS--DESIGN;

EID: 0026141225     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.75050     Document Type: Article
Times cited : (200)

References (13)
  • 1
    • 0024719269 scopus 로고
    • Waveform degradation in VLSI interconnections
    • Aug.
    • H. R. Kaupp, “Waveform degradation in VLSI interconnections,” IEEE J. Solid-State Circuits, vol. 24, no. 4, pp. 1150–1153, Aug. 1989.
    • (1989) IEEE J. Solid-State Circuits , vol.24 , Issue.4 , pp. 1150-1153
    • Kaupp, H.R.1
  • 2
    • 34748823693 scopus 로고
    • The transient response of damped linear networks with particular regard to wideband amplifiers
    • Jan.
    • W. C. Elmore, “The transient response of damped linear networks with particular regard to wideband amplifiers,” J. Appl. Phys., vol. 19, no. 1, pp. 55–63, Jan. 1948.
    • (1948) J. Appl. Phys , vol.19 , Issue.1 , pp. 55-63
    • Elmore, W.C.1
  • 3
    • 0001774487 scopus 로고
    • Current conveyor theory and practice
    • C. Toumazou, F. J. Lidgey, and D. G. Haigh, Eds. London: Peter Peregrinus, ch. 3
    • A. S. Sedra and G. W. Roberts, “Current conveyor theory and practice,” in Analogue IC Design: The Current-Mode Approach, C. Toumazou, F. J. Lidgey, and D. G. Haigh, Eds. London: Peter Peregrinus, 1990, ch. 3.
    • (1990) Analogue IC Design: The Current-Mode Approach
    • Sedra, A.S.1    Roberts, G.W.2
  • 4
    • 84888058145 scopus 로고
    • Analog interface circuits for VLSI
    • C. Toumazou, F. J. Lidgey, and D. G. Haigh, Eds. London: Peter Peregrinus, ch. 12
    • E. Seevinck, “Analog interface circuits for VLSI,” in Analogue IC Design: The Current-Mode Approach, C. Toumazou, F. J. Lidgey, and D. G. Haigh, Eds. London: Peter Peregrinus, 1990, ch. 12.
    • (1990) Analogue IC Design: The Current-Mode Approach
    • Seevinck, E.1
  • 5
    • 0015604566 scopus 로고
    • Precision differential voltage-current converter
    • Mar.
    • R. Caprio, “Precision differential voltage-current converter,” Electron. Lett., vol. 9, no. 6, pp. 147–148, Mar. 1973.
    • (1973) Electron. Lett , vol.9 , Issue.6 , pp. 147-148
    • Caprio, R.1
  • 6
    • 0025532357 scopus 로고
    • An experimental 2Tcell RAM with 7 ns access time at low temperature
    • June
    • T. N. Blalock and R. C. Jaeger, “An experimental 2Tcell RAM with 7 ns access time at low temperature,” in Symp. VLSI Circuits, Dig. Tech. Papers, June 1990, pp. 13–14.
    • (1990) Symp. VLSI Circuits, Dig. Tech. Papers , pp. 13-14
    • Blalock, T.N.1    Jaeger, R.C.2
  • 7
    • 0025537328 scopus 로고
    • A 1.5 V circuit technology for 64 Mb DRAMs
    • June
    • Y. Nakagome et al., “A 1.5 V circuit technology for 64 Mb DRAMs,” in Symp. VLSI Circuits, Dig. Tech. Papers, June 1990, pp. 17–18.
    • (1990) Symp. VLSI Circuits, Dig. Tech. Papers , pp. 17-18
    • Nakagome, Y.1
  • 8
    • 0025568311 scopus 로고
    • An experimental 5 ns BiCMOS SRAM with a high-speed architecture
    • June
    • K. Fung et al., “An experimental 5 ns BiCMOS SRAM with a high-speed architecture,” in Symp. VLSI Circuits, Dig. Tech. Papers, June 1990, pp. 43–44.
    • (1990) Symp. VLSI Circuits, Dig. Tech. Papers , pp. 43-44
    • Fung, K.1
  • 9
    • 0025551779 scopus 로고
    • A current sense-amplifier for fast CMOS SRAMs
    • June
    • E. Seevinck, “A current sense-amplifier for fast CMOS SRAMs,” in Symp. VLSI Circuits, Dig. Tech. Papers, June 1990, pp. 71–72.
    • (1990) Symp. VLSI Circuits, Dig. Tech. Papers , pp. 71-72
    • Seevinck, E.1
  • 10
    • 0024089463 scopus 로고
    • A 25 ns low-power full-CMOS 1 Mbit (128 k × 8) SRAM
    • Oct.
    • S. T. Chu et al., “A 25 ns low-power full-CMOS 1 Mbit (128 k × 8) SRAM,” IEEE J. Solid-State Circuits, vol. 23, no. 5, pp. 1078–1084, Oct. 1988.
    • (1988) IEEE J. Solid-State Circuits , vol.23 , Issue.5 , pp. 1078-1084
    • Chu, S.T.1
  • 11
    • 0023553865 scopus 로고
    • A 1M SRAM with full-CMOS cells fabricated in a 0.7 μm technology
    • Dec.
    • R. de Werdt et al., “A 1M SRAM with full-CMOS cells fabricated in a 0.7 μm technology,” in IEDM Tech. Dig., Dec. 1987, pp. 532–535.
    • (1987) IEDM Tech. Dig , pp. 532-535
    • de Werdt, R.1
  • 12
    • 0024751720 scopus 로고
    • A 9-ns 1-Mbit CMOS SRAM
    • Oct.
    • K. Sasaki et al., “A 9-ns 1-Mbit CMOS SRAM,” IEEE J. Solid-State Circuits, vol. 24, no. 5, pp. 1219–1224, Oct. 1989.
    • (1989) IEEE J. Solid-State Circuits , vol.24 , Issue.5 , pp. 1219-1224
    • Sasaki, K.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.