Using an FPGA for fast bit accurate soc simulation

Proceedings - 21st International Parallel and Distributed Processing Symposium, IPDPS 2007; Abstracts and CD-ROM

Volumn , Issue , 2007, Pages

  Wolkotte, Pascal T ^a   Hölzenspies, Philip K F ^a   Smit, Gerard J M ^a  

^a UNIVERSITY OF TWENTE   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; MICROPROCESSOR CHIPS; PARALLEL PROCESSING SYSTEMS;

BIT LEVEL ACCURACY; SEQUENTIAL SIMULATION; SIMULATION PLATFORMS;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 34548791181     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPS.2007.370374     Document Type: Conference Paper

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