Providing QoS guarantees in a NoC by virtual channel reservation

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 3985 LNCS, Issue , 2006, Pages 299-310

  Kavaldjiev, Nikolay ^a   Smit, Gerard J M ^a   Wolkotte, Pascal T ^a   Jansen, Pierre G ^a  

^a UNIVERSITY OF TWENTE   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMMUNICATION CHANNELS (INFORMATION THEORY); COMPUTER NETWORKS; TELECOMMUNICATION TRAFFIC; THROUGHPUT; VIRTUAL REALITY;

NETWORK-ON-CHIP (NOC); TRAFFIC LOCALITY; VIRTUAL CHANNEL RESERVATION; VIRTUAL CHANNELS;

QUALITY OF SERVICE;

EID: 33749021076     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/11802839_38     Document Type: Conference Paper

References (14)

1. Dally, W., Towles, B.: Route packets, not wires: on-chip interconnection networks. In: Proceedings of the 38th Conference on Design Automation (DAC'01), ACM Press (2001) 684-689
2. Dally, W.: Virtual-channel flow control. IEEE Transactions on Parallel and Distributed Systems, 3 (1992) 194-205
3. Goossens, K., van Meerbergen, J., Peeters, A., Wielage, R.: Networks on silicon: combining best-effort and guaranteed services. In: Proceedings of the Design, Automation and Test in Europe Conference (DATE'02). (2002) 423-425
4. Millberg, M., Nilsson, E., Thid, R., Jantsch, A.: Guaranteed bandwidth using looped containers in temporally disjoint networks within the nostrum network on chip. In: Proceedings of the Design, Automation and Test in Europe Conference (DATE'04). Volume 2., IEEE Computer Society (2004) 890-895
5. Muttersbach, J., Villiger, T., Kaeslin, H., Felber, N., Fichtner, W.: Globally-asynchronous locally-synchronous architectures to simplify the design of on-chip systems. In: Proceedings of the 12-th Annual IEEE International ASIC/SOC Conference. (1999) 317-321
6. Wolkotte, P., Smit, G., Rauwerda, G.: An energy-efficient reconfigurable circuit switched network-on-chip. In: Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05). (2005) 155-161
7. Felicijan, T., Furber, S.: An asynchronous on-chip network router with quality-of-service (qos) support. In: Proceedings of the IEEE International System-on-Chip Conference (SOCC'04), IEEE Computer Society (2004) 274-277
8. Kavaldjiev, N., Smit, G., Jansen, P.: A virtual channel router for on-chip networks. In: Proceedings of the IEEE International System-on-Chip Conference (SOCC'04), IEEE Computer Society (2004) 289-293
9. Cormen, T., Leiserson, C., Rivest, R., Stein, C.: Introduction to algorithms. 2 edn. MIT Press, Cambridge, Massachusetts (2001)
10. Rauwerda, G., Heysters, P., Smit, G.: Mapping wireless communication algorithms onto a reconfigurable architecture. Journal of Supercomputing 30 (2004) 263-282
11. Wolkotte, P., Smit, G., Smit, L.: Partitioning of a drm receiver. In: Proceedings of the 9th International OFDM-Workshop. (2004) 299-304
12. Wolkotte, P., Smit, G., Kavaldjiev, N., Becker, J., Becker, J.: Energy model of networks-on-chip and a bus. In: Proceedings of the International Symposium on System-on-Chip (SoC'05). (2005) 82-85
13. Dally, W., Towles, B.: Principles and Practices of Interconnection Networks. The Morgan Kaufmann Series in Computer Architecture and Design. Morgan Kaufmann, San Francisco, CA (2003)
14. Heysters, P., Smit, G., Molenkamp, E.: A flexible and energy-efficient coarse-grained reconfigurable architecture for mobile systems. Journal of Supercomputing 26 (2003) 283-308