Constant-time addition with hybrid-redundant numbers: Theory and implementations

Integration, the VLSI Journal

Volumn 41, Issue 1, 2008, Pages 49-64

  Jaberipur, Ghassem ^a,b   Parhami, Behrooz ^c  

^a SHAHID BEHESHTI UNIVERSITY   (Iran)

^b INSTITUTE FOR STUDIES IN THEORETICAL PHYSICS AND MATHEMATICS IPM   (Iran)

^c University of California   (United States)

Author keywords

Arithmetic unit; Carry free addition; Computer arithmetic; redundant number representation; Signed digit number system

Indexed keywords

ADDERS; DIGITAL ARITHMETIC; ELECTRIC INVERTERS; PROBLEM SOLVING; REDUNDANCY; VLSI CIRCUITS;

ARITHMETIC UNIT; CARRY-FREE ADDITION; COMPUTER ARITHMETICS; REDUNDANT NUMBER REPRESENTATION; SIGNED-DIGIT NUMBER SYSTEM;

NUMBER THEORY;

EID: 34548502918     PISSN: 01679260     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.vlsi.2007.01.002     Document Type: Article

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