Constant-time addition and simultaneous format conversion based on redundant binary representations

IEEE Transactions on Computers

Volumn 50, Issue 11, 2001, Pages 1267-1278

  Phatak, Dhananjay S ^a   Goff, Tom ^a   Koren, Israel ^b  

^a University of Marylandw Baltimore County   (United States)

^b University of Massachusetts   (United States)

Author keywords

4:2 compressor; Carry save addition; Constant time addition; Redundant adders; Redundant representations; Signed digit addition; Simultaneous format conversion

Indexed keywords

ADDERS; DATA FLOW ANALYSIS; REDUNDANCY; VLSI CIRCUITS;

DIGIT SET CONVERSION; FORMAT CONVERSION;

BINARY SEQUENCES;

EID: 0035510679     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.966499     Document Type: Article

References (22)

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