Implementation of a thermal management unit for canceling temperature-dependent clock skew variations

Integration, the VLSI Journal

Volumn 41, Issue 1, 2008, Pages 2-8

  Chakraborty, A ^a   Duraisami, K ^a   Sathanur, A ^a   Sithambaram, P ^a   Macii, A ^a   Macii, E ^a   Poncino, M ^a  

^a POLITECNICO DI TORINO   (Italy)

Author keywords

Low power design; Skew compensation; Temperature aware design

Indexed keywords

PARAMETER ESTIMATION; PRODUCT DESIGN; TEMPERATURE CONTROL; THERMAL GRADIENTS;

LOW POWER DESIGN; SKEW COMPENSATION; TEMPERATURE AWARE DESIGN; WIRE DELAYS;

DIES;

EID: 34548485765     PISSN: 01679260     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.vlsi.2007.03.002     Document Type: Article

References (10)

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