Evaluating benchmark subsetting approaches

Proceedings of the 2006 IEEE International Symposium on Workload Characterization, IISWC - 2006

Volumn , Issue , 2006, Pages 93-104

  Yi, Joshua J ^a   Sendag, Resit ^b   Eeckhout, Lieven ^c   Joshi, Ajay ^d   Lilja, David J ^e   John, Lizy K ^d  

^a FREESCALE SEMICONDUCTOR INC   (United States)

^b University of Rhode Island   (United States)

^c GHENT UNIVERSITY   (Belgium)

^d The University of Texas at Austin   (United States)

^e University of Minnesota   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ABSOLUTE ACCURACIES; BENCHMARK SUITES; COMPUTER ARCHITECTS; DELAY PRODUCTS; INPUT SETS; MEMORY SUB SYSTEMS; PRINCIPAL COMPONENTS ANALYSES; RELATIVE ACCURACIES; SIMULATION RESULTS; SIMULATION TIMES; SUBSET SIZES;

PRINCIPAL COMPONENT ANALYSIS;

EID: 34548326364     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IISWC.2006.302733     Document Type: Conference Paper

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