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Volumn 27, Issue 3, 2007, Pages 8-20

Transactional memory: An overview

Author keywords

Memory architecture; Multithreading; Parallel programming; Transactional memory

Indexed keywords

ALGORITHMS; CODES (SYMBOLS); COMPUTATIONAL METHODS; MICROPROCESSOR CHIPS; MULTIPROCESSING SYSTEMS; PARALLEL PROCESSING SYSTEMS;

EID: 34548305255     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/MM.2007.63     Document Type: Review
Times cited : (55)

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    • Exceptions and Side-Effects in Atomic Blocks
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    • T. Harris, "Exceptions and Side-Effects in Atomic Blocks," Science of Computer Programming, vol. 58, no. 3, Dec. 2005, pp. 325-343.
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  • 27
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    • Transactional Locking II
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.