Gate level statistical simulation based on parameterized models for process and signal variations

Proceedings - Eighth International Symposium on Quality Electronic Design, ISQED 2007

Volumn , Issue , 2007, Pages 257-262

  Liu, Bao ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

GATES (TRANSISTOR); MATHEMATICAL MODELS; STATISTICAL METHODS; THRESHOLD VOLTAGE; WAVEFORM ANALYSIS;

MULTIPLE VOLTAGE THRESHOLDS; SIGNAL ARRIVAL TIMES; STATISTICAL STATIC TIMING ANALYSIS (SSTA);

COMPUTER SIMULATION;

EID: 34548141696     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISQED.2007.84     Document Type: Conference Paper

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