Statistical gate delay calculation with crosstalk alignment consideration

Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Volumn 2006, Issue , 2006, Pages 223-228

  Kahng, Andrew B ^a   Liu, Bao ^a   Xu, Xu ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Algorithms; Design; Performance

Indexed keywords

CALCULATIONS; COMPUTATION THEORY; CROSSTALK; ELECTRIC POWER SYSTEM INTERCONNECTION; FIELD PROGRAMMABLE GATE ARRAYS; STATISTICAL METHODS; SWITCHING;

GATE OUTPUT SIGNAL ARRIVAL TIME; PROBABILISTIC COMPUTATION; STANDARD DEVIATION; STATIC TIMING ANALYZERS;

DELAY CIRCUITS;

EID: 33750928573     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1127908.1127961     Document Type: Conference Paper

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