A multi-standard reconfigurable viterbi decoder using embedded FPGA blocks

Proceedings of the 9th EUROMICRO Conference on Digital System Design: Architectures, Methods and Tools, DSD 2006

Volumn , Issue , 2006, Pages 146-151

  Bissi, Lucia ^a   Placidi, Pisana ^a   Baruffa, Giuseppe ^a   Scorzoni, Andrea ^a  

^a UNIVERSITY OF PERUGIA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; DATA COMMUNICATION EQUIPMENT; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); TRANSCEIVERS;

CODING RATES; SOFTWARE DEFINED RADIO (SDR); VITERBI DECODER (VD);

DECODING;

EID: 34547992574     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSD.2006.12     Document Type: Conference Paper

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