Domain specific reconfigurable fabric targeting viterbi algorithm

Proceedings - 2004 IEEE International Conference on Field-Programmable Technology, FPT '04

Volumn , Issue , 2004, Pages 363-366

  Zhan, Cheng ^a   Khawam, Sami ^a   Arslan, Tughrul ^a,b  

^a UNIVERSITY OF EDINBURGH   (United Kingdom)

^b INSTITUTE FOR SYSTEM LEVEL INTEGRATION   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; DIGITAL SIGNAL PROCESSING; FIELD PROGRAMMABLE GATE ARRAYS; POLYNOMIALS; RANDOM ACCESS STORAGE;

BRANCH METRIC UNIT (BMU); SURVIVOR MEMORY UNIT (SMU); SYSTEM-ON-CHIP DEVICES; VITERBI DECODERS;

DECODING;

EID: 20844460764     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. Khawam S., Arslan T., Westall F., "Embedded reconfigurable array targeting motion estimation applications", Proceedings of the 2003 IEEE International Symposium on Circuits and Systems (ISCAS'03), May 2003, Vol.2, Page(s): 760-763
2. Abnous, A.; Rabaey, J., "Ultra-low-power domain-specific multimedia processors" VLSI Signal Processing, IX, 1996, 30 Oct. - 1 Nov. 1996 Page(s):461-470
3. A.J Viterbi, "Error bounds for convolutional codes and an asymptotically optimum decoding algorithm," IEEE Transactions on Information Theory, vol. IT-13, pp.260-269, April 1967
4. P.J.Black and T.H.Meng, "A 140-Mb/s, 32-state, radix-4 Viterbi decoder," IEEE Journal of Solid-State Circuit, vol. 27, no.12, pp. 1877-1885, December 1992
5. J.A.Heller and I.M.Jacobs, "Viterbi decoding for satellite and space communication," IEEE Transactions Communication Technology, vol. COM-19, no.5, Page(s): 835-848, Oct, 1971
6. TI TMS320C6416T DSP data sheet, http://www.ti.com