Influence of process steps on the performance of microcrystalline silicon thin film transistors

Thin Solid Films

Volumn 515, Issue 19 SPEC. ISS., 2007, Pages 7662-7666

  Oudwan, Maher ^a   Djeridane, Yassine ^b   Abramov, Alexey ^b   Aventurier, Bernard ^a   Roca i Cabarrocas, Pere ^b   Templier, François ^a  

^a CEA LETI   (France)

^b LABORATOIRE DE PHYSIQUE DES INTERFACES ET DES COUCHES MINCES   (France)

Author keywords

Active matrix; Microcrystalline silicon; TFT

Indexed keywords

INTERFACES (MATERIALS); LEAKAGE CURRENTS; MICROCRYSTALLINE SILICON; PASSIVATION; THRESHOLD VOLTAGE;

GATE VOLTAGE; LINEAR MOBILITY; OXYGEN CONTAMINATION; PASSIVATION LAYER;

THIN FILM TRANSISTORS;

EID: 34547583684     PISSN: 00406090     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.tsf.2006.11.102     Document Type: Article

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