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Volumn , Issue , 2006, Pages 1119-1122

Memory-based cross-talk canceling CODECs for on-chip buses

Author keywords

[No Author keywords available]

Indexed keywords

METAL LAYERS; ON-CHIP WIRES; REDUCED ORDERED BINARY DECISION DIAGRAM (ROBDD); SIGNAL WIRES;

EID: 34547258011     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (3)

References (19)
  • 2
    • 84858093070 scopus 로고    scopus 로고
    • Physical Design Modelling and Verification Project SPACE Project
    • Physical Design Modelling and Verification Project (SPACE Project). http://cas.et.tudelft.nl/research/space/html.
  • 3
    • 0022769976 scopus 로고
    • Graph based algorithms for Boolean function representation
    • August
    • R. E. Bryant. Graph based algorithms for Boolean function representation. IEEE Transactions on Computers, C-35:677-690, August 1986.
    • (1986) IEEE Transactions on Computers , vol.C-35 , pp. 677-690
    • Bryant, R.E.1
  • 5
    • 84950134284 scopus 로고    scopus 로고
    • Analysis and avoidance of cross-talk lit on-chip buses
    • Stanford, CA, Aug
    • C. Duan, A. Tirumala, and S. Khatri. Analysis and avoidance of cross-talk lit on-chip buses. In Hot Interconnects 9, pages 133-138, Stanford, CA, Aug 2001.
    • (2001) Hot Interconnects 9 , pp. 133-138
    • Duan, C.1    Tirumala, A.2    Khatri, S.3
  • 8
    • 84858093068 scopus 로고    scopus 로고
    • The International Technology Roadmap for Semiconductors
    • The International Technology Roadmap for Semiconductors, http://public.itrs.net, 2003.
    • (2003)
  • 15
    • 84949766294 scopus 로고    scopus 로고
    • P. Sotiriadis and A. Chandraknsan. Reducing bus delay in submicron technology using coding. In Proceedings Asia and South Pacific Design Automation Conference (ASP-DAC), pages 109-114, Yokohama, Japan, Jan/Fob 2001.
    • P. Sotiriadis and A. Chandraknsan. Reducing bus delay in submicron technology using coding. In Proceedings Asia and South Pacific Design Automation Conference (ASP-DAC), pages 109-114, Yokohama, Japan, Jan/Fob 2001.
  • 19
    • 0032643013 scopus 로고    scopus 로고
    • Reducing cross-coupling among interconnect wires in deep-submicron datapath design
    • New Orleans, LA, Jun
    • J.-S. Yim and C.-M. Kyung. Reducing cross-coupling among interconnect wires in deep-submicron datapath design. In Proceedings. 36th Design Automation Conference (DAC), pages 485-490, New Orleans, LA, Jun 1999.
    • (1999) Proceedings. 36th Design Automation Conference (DAC) , pp. 485-490
    • Yim, J.-S.1    Kyung, C.-M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.