Flexible architecture of ultra-low-power current-mode interleaved successive approximation analog-to-digital converter for wireless sensor networks

VLSI Design

Volumn 2007, Issue , 2007, Pages

  Długosz, Rafał ^a,b   Iniewski, K ^c  

^a UNIVERSITY OF NEUCHÂTEL   (Switzerland)

^b UNIVERSITY OF ALBERTA   (Canada)

^c CMOS Emerging Technologies Inc   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 34547159249     PISSN: 1065514X     EISSN: None     Source Type: Journal    
DOI: 10.1155/2007/45269     Document Type: Article

References (34)

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