Demonstration of metal-gated low Vt n-MOSFETs using a poly-Si/ TaN/Dy2O3/SiON gate stack with a scaled EOT value

IEEE Electron Device Letters

Volumn 28, Issue 7, 2007, Pages 656-658

  Yu, H Y ^a   Singanamalla, R ^a,b   Ragnarsson, L A ^a   Chang, V S ^c   Cho, H J ^d   Mitsuhashi, R ^e   Adelmann, C ^a   Van Elshocht, S ^a   Lehnen, P ^a   Chang, S Z ^c   Yin, K M ^f   Schram, T ^a   Kubicek, S ^a   De Gendt, S ^a   Absil, P ^a   De Meyer, K ^a,b   Biesemans, S ^a  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

^c Taiwan Semiconductor Manufacturing Company Research Center   (Belgium)

^d Samsung   (Belgium)

^e Matsushita   (Belgium)

^f TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

Author keywords

DySiON; Dysprosium oxide (Dy2O3); MIPS; n MOSFETs; SiON; TaN

Indexed keywords

THIN DYSPROSIUM OXIDE; TIME-ZERO-BREAK-DOWN CHARACTERISTICS;

DIELECTRIC MATERIALS; DYSPROSIUM COMPOUNDS; SILICON COMPOUNDS; THRESHOLD VOLTAGE; TRANSMISSION ELECTRON MICROSCOPY;

MOSFET DEVICES;

EID: 34447263841     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2007.900308     Document Type: Article

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